Note: This is a summary document. A complete document
is available under NDA. For more information, please con-
tact your local Atmel sales office.
Features
Integrates All Required Components for Complete ATAPI DVD/CD Writer Solution
Data Channel
Servo Control Processor
DVD ECC ENDEC
CD CIRC C3 ENDEC
Buffer Management
EFM EFM+ 1.7 PP ENDEC
ATAPI Interface
Formats Supported
DVD-ROM
DVD-R
DVD-RW
DVD+R
DVD+RW
Blue Laser DVD
CD-ROM Mode 1
CD-ROM Mode 2
CD-ROM XA Mode 2 Form 1
CD-ROM XA Mode 2 Form 2
CD-DA
CD-R
CD-RW
Read/Write Speeds Supported
DVD-ROM
16x
DVD+R
16x
DVD+RW
8x
DVD-R
16x
DVD-RW
8x
Blue Laser DVD
8x
CD-R
52x
CD-RW
48x
CD-ROM
52x
Pick-up Head Interface
Auto Laser Power Control (ALPC) Circuit
Supports Alpha (ROPC) Loop and OPC
Programmable Serial Interface to OPU for Write Strategy Control
Supports OPU Current Type and Voltage Type
TWI interface to Access the EEPROM Serial Number
Host Interface
ATAPI Compatible ATA-6 Host Mode
Ultra DMA Support (100 MB/s)
Direct Interface to ATAPI Bus
Processor
ARM946E-S
TM
RISC Processor
Internal SRAM for Data
Parallel External 16-bit Width Flash for Code, 512 Kbyte (max)
DVD PRML
Channel and
System
Controller SoC
AT78C4050
Summary
3507BSNETST6/05
2
3507BSNETST6/05
AT78C4050
Error Correction
Real Time DVD ECC Encoder and Decoder for 32 Kbyte Block
Real Time DVD ECC Encoder and Decoder for Blue Laser DVD
DVD EDC Error Detection
Error Correction for Pre-pit, ATIP, ADIP, ID, Wobble Data for Blue Laser DVD
Real Time CD CIRC Encoder and Decoder
Real Time CD C3 ECC Encoder and Decoder
CD EDC Error Detection
CD Sub-code Error Correction
Data Format
EFM and EFM+ Modulation and Demodulation
1.7 PP Modulation and Demodulation for Blue Laser DVD
Target ID Detection
Support DVD-R/RW 2K and 32K Linking Loss
Support CD-R/RW Link Sector Read
Support CD-R/RW Address Mode 1 and Mode 2
ATIP, ADIP, Pre-pit, Blue Laser DVD Wobble Information Decoder
Buffer Manager
Supports SDRAM Up to 16 Mbytes (8M x 16)
Support Buffer Underrun Prevention
Support Variable Buffer Segmentation
Circular Buffer Control with Access Priority
Programmable Timing Control for SDRAM
Servo
Servo Processing Unit Using ARM946E-S
Maximum Processing Power with 200 MHz System Clock
Internal RAM for Code and Data (24 KB)
Digital Servo Adapted to Various OPU
Digital DPD for Tracking Error
1 and 3 Beams Push/Pull Tracking Detection
Digital Detector for Blank Detect, Media Recognition and Defect Detect
Wobble PLL, Pre-pit Detector, Frequency Demodulator, BPSK Demodulator
and MSK STW Demodulator
Read Channel
PRML Read Channel to Support High Speed Transfer Rates
RF Data Channel
Wide Bandwidth Automatic Gain Control Analog Front-end
Programmable 7
th
Order Continuous Filter
7-bit ADC for Sampling the PRML Read Signal
15 Tap Adaptive Digital FIR Equalizers
Digital Viterbi Detector
Clock Recovery and Synthesizer Functions
Wide Frequency Range of Clock Extraction
Frequency Synthesizer with M/N Dividers
Supporting CLV, CAV, PCAV and ZCLV
Supports Write Clock Synthesis with a Low Jitter PLL
Integrated Servo Algebra and ALPC Functions
Supports Sampled Signals for Differential Phase Detection (DPD),
and Push/Pull Tracking Detection
Wobble Detection of DVD+R and DVD+RW
3
3507BSNETST6/05
AT78C4050
Pre-pit Detection of DVD-R/W
ADIP/ATIP Detection
ALPC Closed Loop Capability to Support OPC/ROPC
Integrated Servo Pre-drivers for Focus, Track and Spindle Motor
Integrated On-chip Calibrator to Remove Circuit Offsets
Integrated Audio Drivers
On-chip Sequencer to Internally Generate Control Signals for RF AGC,
Timing Recovery, Calibration and Various Servo Algebra Loops
1.
Description
The AT78C4050 is ATMEL's high-integration, high performance single chip solution for DVD-
ROM, DVD-R/RW, DVD+R/RW, CD-ROM, CD-R/RW and Blue Laser formats. It integrates all
required components for a DVD and CD rewritable drive as well as for a DVD recorder. The
AT78C4050 includes data channel, DVD ECC, CD CIRC C3, buffer management, DVD CD
1.7PP, EFM+, EFM Endec and ATAPI interface logic.
The AT78C4050 is programmed by an external flash, and needs an external SDRAM, and a
power driver to create a complete DVD/CD rewritable solution. This chip can be connected to an
MPEG Endec to build a DVD recorder for consumer electronics applications.
DVD disk read and write speeds of up to 16x, CD-ROM disc reading and writing speeds of up to
54x, Blue Laser DVD speeds of up to 8x can be implemented.
The AT78C4050 supports various types of OPUs. Either a current output OPU or voltage output
OPU can be connected to AT78C4050. ALPC, ROPC and OPC manage operation of the laser
diode driver IC and control the writing process. On-chip features and programming options
improve performance in high-speed systems.
Digital Servo control provides flexibility that enables the AT78C4050 to support various PDIC
output. The calibration control is implemented by firmware. The Servo processor implements the
focus, track, tilt, seek and spindle control loop, which off loads the master processor burden.
Push-pull tracking error, DPD tracking error and Astigmatic Focus error detection are available.
The chip provides all CLV, CAV, ZCLV and PCAV spin modes.
The AT78C4050 offers buffer underrun prevention for all types of discs. The data buffer size is
up to 16 Mbytes with circular buffer method. The SDRAM controller supports various SDRAM
chips. AT78C4050 supports Audio buffer playback. The buffer management provides pre-read-
ing and cache to increase the data throughput.
The ATAPI host interface is designed in compliance with the ATAPI specification, which sup-
ports UltraDMA 100 Mbyte/s transfer rate. This device is fabricated in 0.13 m CMOS
technology.
4
3507BSNETST6/05
AT78C4050
Figure 1-1.
Block Diagram
Flash
Memory
I/F
ARM946
Processor
SRAM
AMBA Bridge
Buffer
Access
GPIO
TC
INT
SPI
AHB_A
APB_A
EFM+ Decoder
DVD Decoder
EFM Decoder
CD Decoder
CIRC
DVD Encoder
EFM+ ENcoder
CIRC
CD Encoder
EFM Encoder
SubCode
Disk
Write
I/F
DVD ECC
Encoder
CD C3 Encoder
Write
Control
WCS
ATAPI
Servo Controller
(ARM946ES)
Servo Front End
Wobble Detector
PLL
Servo Back End
Speed Counter
Defect Detector
Timer/Counter
Blank Detector
Media Judge
Audio
I/F
Audio
DAC
Mul
Channel
Power
Driver
OPU
SDRAM
Audio
Output
PLL
GPIO
GPIO
GPIO
ATIP
ADIP
Prepit
Decoder
ATAPI IF
DVD ECC
Decoder
CD C3 Decoder
WCLK
PLL
PRML Read
Channel
ALPC/
OPC
WBCLK
WBDATA
WCLK
WBCLK
TWI
TWI Interface
Tray Motor Driver
Sensor
WClk
Wobble Sync
Wobble Sync
Wobble Data
INT Controller
Track count
Velocity
DPD Front End
Tracking Error
Digital DPD
Track Counter
DTCM BUS
Code Memory
32KB
Data Memory
8KB
Shared
Memory
AHB_B Bus
AHB_B Bus
Bridge
APB_B Bus
AHB_A Bus
Sys Controller
DTCM
Bus
DTCM Bus
BUF
Management
Printed on recycled paper.
3507BSNETST6/05
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