October 1987
Revised February 1999
MM74HC148 8-3 Li
ne
Pr
ior
i
t
y
Encode
r
1999 Fairchild Semiconductor Corporation
DS009390.prf
www.fairchildsemi.com
MM74HC148
8-3 Line Priority Encoder
General Description
The MM74HC148 priority encoder utilizes advanced sili-
con-gate CMOS technology. It has the high noise immunity
and low power consumption typical of CMOS circuits, as
well as the speeds and output drive similar to LB-TTL.
This priority encoder accepts 8 input request lines 07 and
outputs 3 lines A0A2. The priority encoding ensures that
only the highest order data line is encoded. Cascading cir-
cuitry (enable input EI and enable output EO) has been
provided to allow octal expansion without the need for
external circuitry. All data inputs and outputs are active at
the low logic level.
All inputs are protected from damage due to static dis-
charge by internal diode clamps to V
CC
and ground.
Features
s
Typical propagation delay: 13 ns
s
Wide supply voltage range: 2V6V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Pin Assignments for DIP, SOIC and TSSOP
Truth Table
H
=
HIGH
L
=
LOW
X
=
Irrelevant
Order Number
Package Number
Package Description
MM74HC148M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC148MTC
MTC16
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
MM74HC148N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Inputs
Outputs
EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO
H X X X X X X X X
H
H
H
H
H
L H H H H H H H H
H
H
H
H
L
L X X X X X X X L
L
L
L
L
H
L X X X X X X L H
L
L
H
L
H
L X X X X X L H H
L
H
L
L
H
L X X X X L H H H
L
H
H
L
H
L X X X L H H H H
H
L
L
L
H
L X X L H H H H H
H
L
H
L
H
L X L H H H H H H
H
H
L
L
H
L
L H H H H H H H
H
H
H
L
H
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4
MM
74HC148
Absolute Maximum Ratings
(Note 1)
(Note 2)
Recommended Operation
Conditions
Note 1: Absolute Maximum Ratings are those values beyond which dam-
age to the device may occur.
Note 2: Unless otherwise specified all voltages are referenced to ground.
Note 3: Power Dissipation temperature derating--plastic "N" package:
-
12
mW/
C from 65
C to 85
C.
DC Electrical Characteristics
(Note 4)
Note 4: For a power supply of 5V
10% the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
Supply Voltage (V
CC
)
-
0.5 to
+
7.0V
DC Input Voltage (V
IN
)
-
1.5 to V
CC
+
1.5V
DC Output Voltage (V
OUT
)
-
0.5 to V
CC
+
0.5V
Clamp Diode Current (I
IK
, I
OK
)
20 mA
DC Output Current, per pin (I
OUT
)
25 mA
DC V
CC
or GND Current, per pin (I
CC
)
50 mA
Storage Temperature Range (T
STG
)
-
65
C to
+
150
C
Power Dissipation (P
D
)
(Note 3)
600 mW
S.O. Package only
500 mW
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
C
Min
Max
Units
Supply Voltage (V
CC
)
2
6
V
DC Input or Output Voltage
(V
IN
, V
OUT
)
0
V
CC
V
Operating Temperature Range (T
A
)
-
40
+
85
C
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
1000
ns
V
CC
=
4.5V
500
ns
V
CC
=
6.0V
400
ns
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40 to 85
C T
A
=
-
55 to 125
C
Units
Typ
Guaranteed Limits
V
IH
Minimum HIGH Level
2.0V
1.5
1.5
1.5
V
Input Voltage
4.5V
3.15
3.15
3.15
V
6.0V
4.2
4.2
4.2
V
V
IL
Maximum LOW Level
2.0V
0.5
0.5
0.5
V
Input Voltage
4.5V
1.35
1.35
1.35
V
6.0V
1.8
1.8
1.8
V
V
OH
Minimum HIGH Level
V
IN
=
V
IH
or V
IL
Output Voltage
|I
OUT
|
20
A
2.0V
2.0
1.9
1.9
1.9
V
4.5V
4.5
4.4
4.4
4.4
V
6.0V
6.0
5.9
5.9
5.9
V
V
IN
=
V
IH
or V
IL
|I
OUT
|
4.0 mA
4.5V
4.7
3.96
3.84
3.7
V
|I
OUT
|
5.2 mA
6.0V
5.2
5.48
5.34
5.2
V
V
OL
Maximum LOW Level
V
IN
=
V
IH
or V
IL
Output Voltage
|I
OUT
|
20
A
2.0V
0
0.1
0.1
0.1
V
4.5V
0
0.1
0.1
0.1
V
6.0V
0
0.1
0.1
0.1
V
V
IN
=
V
IH
or V
IL
|I
OUT
|
4.0 mA
4.5V
0.2
0.26
0.33
0.4
V
|I
OUT
|
5.2 mA
6.0V
0.2
0.26
0.33
0.4
V
I
IN
Maximum Input
V
IN
=
V
CC
or GND
6.0V
0.1
1.0
1.0
A
Current
I
CC
Maximum Quiescent
V
IN
=
V
CC
or GND
6.0V
8.0
80
160
A
Supply Current
I
OUT
=
0
A
5
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MM74HC148
AC Electrical Characteristics
AC Electrical Characteristics
V
CC
= 2.0V to 6.0V, C
L
= 50 pF, t
r
= t
f
= 6 ns (unless otherwise specified)
Note 5: C
pd
determines the no load dynamic power consumption, and the no load dynamic current consumption.
Symbol
Parameter
Conditions
Typ
Guaranteed
Limits
Units
t
PHL
, t
PLH
Maximum Propagation Delay,
14
ns
Any Input to Any Output
Symbol
Parameter
Conditions
V
CC
T
A
=
25
C
T
A
=
-
40
C to
+
85
C T
A
=
-
55
C to
+
125
C
Units
Typ
Guaranteed Limits
t
PHL
, t
PLH
Inputs 07
2.0V
140
175
210
ns
to Outputs
4.5V
14
28
35
42
ns
A0, A1, A2
6.0V
24
30
36
ns
t
PHL
, t
PLH
Inputs 07
2.0V
140
175
210
ns
to
4.5V
15
28
35
42
ns
Output EO
6.0V
24
30
36
ns
t
PHL
, t
PLH
Inputs 07
2.0V
160
200
240
ns
to
4.5V
17
32
40
48
ns
Output GS
6.0V
27
34
41
ns
t
PHL
, t
PLH
Input EI
2.0V
160
200
240
ns
to Outputs
4.5V
17
32
40
48
ns
A0, A1, A2
6.0V
27
34
41
ns
t
PHL
, t
PLH
Input EI
2.0V
100
125
150
ns
to
4.5V
12
20
25
30
ns
Output GS
6.0V
17
21
26
ns
t
PHL
, t
PLH
Input EI
2.0V
100
125
150
ns
to
4.5V
12
20
25
30
ns
Output EO
6.0V
17
21
26
ns
t
f
, t
r
Maximum
2.0V
75
95
110
ns
Output Rise
4.5V
7
15
19
22
ns
and Fall Time
6.0V
13
16
19
ns
C
pd
Power Dissipation
52
pF
Capacitance (Note 5)
C
in
Maximum Input
5
10
10
10
pF
Capacitance
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