GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com
www.gennum.com
Revision Date: August 2000
Document No. 522 - 28 - 00
PRELIMINARY DATA SHEET
G
S
1
545
FEATURES
SMPTE 292M compliant
1.485 and 1.485/1.001Gb/s operation
integrated adaptive cable equalizer
integrated adjustment-free reclocker
1:20 serial to parallel conversion
selectable reclocked serial output
analog/digital input MUX
carrier detect
LOCK detect
input jitter indicator (IJI)
cable length indication
maximum cable length adjust
20 bit output
74.25MHz or 74.25/1.001MHz clock output
single +5.0V power supply
minimal component count for HD SDI receive
solutions
APPLICATIONS
SMPTE 292M Serial Digital Interfaces for Video Cameras,
Camcorders, VTR's, Signal Generators, Portable
Equipment, and NLE's.
DESCRIPTION
The GS1545 is a high performance integrated Equalizing
Receiver designed for HDTV component signals,
conforming to the SMPTE 292M standard. The GS1545
includes adjustment free, adaptive cable equalization, clock
and data recovery, and serial to parallel conversion.
The Equalizer stage features DC restoration for immunity to
the DC content in pathological test patterns.
The Clock and Data Recovery stage was designed to
automatically recover the embedded clock signal and
retime the data from SMPTE 292M compliant digital video
signals. There is also a selectable reclocked serial data
output and the ability to bypass the reclocker stage.
A unique feature, Input Jitter Indicator (IJI), is included for
robust system design. This feature is used to indicate
excessive input jitter before the chip mutes the outputs.
The Serial to Parallel conversion stage provides 1:20 S/P
conversion
The GS1545 uses the GO1515 external VCO connected to
the internal PLL circuitry to achieve ultra low noise PLL
performance.
SIMPLIFIED BLOCK DIAGRAM
ORDERING INFORMATION
PART NUMBER
PACKAGE
TEMPERATURE
GS1545-CQR
128 pin MQFP
0C to 70C
RECLOCKER
CORE
EQUALIZER
CORE
S/P CONVERTER
BUFFER2
SDO_EN
SDO
SDO
DATA_OUT[19:0]
DDI
DDI_V
TT
(opt)
DDI
A/D
SDI
SDI
ANALOG-
DIGITAL
MUX &
BUFFER
SDOint
SDOint
PCLK_OUT
HD-LINX
TM
GS1545
HDTV Serial Digital
Equalizing Receiver
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FUNCTIONAL BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
T
A
= 25C, unless otherwise shown.
PARAMETER
VALUE
Supply Voltage (V
S
)
5.5V
Input Voltage Range (any input)
V
EE
0.5 < V
IN
< V
CC
+ 0.5
Operating Temperature Range
0C
T
A
70C
Storage Temperature Range
-40C
T
S
150C
Power Dissipation (V
CC
= 5.25V)
2.1W
Lead Temperature (soldering 10 seconds)
260C
Input ESD Voltage
TBD
Junction Temperature
125C
PLL_LOCK
RECLOCKER CORE
S/P CONVERTER
CORE
BUFFER2
SDO_EN
BYPASS
SDO
SDO
DATA_OUT[19:0]
DDI
DDI_V
TT
(opt)
DDI
PCLK_OUT
MUTE
PHASE
DETECTOR
CHARGE
PUMP
PHASE
LOCK
LOGIC
GO1515
BYP
ASS
MUX
LFS LFS
PLCAP PLCAP IJI
VCO
LFA
EQUALIZER CORE
AGC
EQ
CORE
DC
RESTORE
CABLE LENGTH INDICATOR
MAXIMUM CABLE LENGTH ADJUST
CARRIER DETECT
A/D
ANALOG-
DIGITAL
MUX &
BUFFER
BUFFER1
CLI
CD
MCLADJ
SDI
SDI
SDOint+
SDOint-
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DC ELECTRICAL CHARACTERISTICS
V
CC
= 5V, V
EE
= 0V, T
A
= 0C to 70C, Data Rate = 1.485Gb/s.
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
TEST
LEVEL
Positive Supply Voltage
Operating range
V
CC
4.75
5.00
5.25
V
1
Power Consumption
V
CC
= 5; T
A
= 25C
P
D
-
1250
-
mW
5
Supply Current
V
CC
= 5; T
A
= 25C
I
S
-
250
-
mA 1
Output CM Voltage (SDO, SDO)
V
CM
3.75
4.0
4.25
V
5
Input DC Voltage (DDI, DDI)
-
4.0
-
V
1
Input DC Voltage (SDI, SDI)
-
2.7
-
V
1
Serial Inputs (DDI, DDI)
Differential mode
V
SID
100
-
1000
mV
7
Common mode
V
CM
2.5+V
SID/2
-
V
CC
-V
SID/2
V
7
High Level Input Voltage
(A/D, BYPASS)
V
CC
= 5, T
A
= 25C
V
IH
2.0
-
-
V
1
Low Level Input Voltage (A/D,
BYPASS)
V
CC
= 5, T
A
= 25C
V
IL
-
-
0.8
V
1
High Level Output Voltage
(D[19:0], PCLK)
V
CC
= 5, T
A
= 25C,
I
SOURCE
= 1.0mA
V
OH
2.4
-
3.0
V
1
Low Level Output Voltage
(D[19:0], PCLK)
V
CC
= 5, T
A
= 25C,
I
SINK
= 1.0mA
V
OL
-
-
0.4
V
1
High Level Output Voltage
(PLL_LOCK)
V
CC
= 5, T
A
= 25C,
I
SOURCE
= 200A
V
OH
3.0
-
-
V
1
Low Level Output Voltage
(PLL_LOCK)
V
CC
= 5, T
A
= 25C,
I
SINK
= 500A
V
OL
-
-
0.4
V
1
Low Level Output Voltage (CD)
I
SINK
= 500A
V
OL
-
0.2
-
V
1
CLI DC Voltage
1 meter, 800mV p-p Input
-
3.3
-
V
1
CLI DC Voltage
(max cable length)
100 meters, 800mV p-p Input
-
1.3
-
V
1
MCLADJ DC Voltage
1 meter, 800mV p-p Input
-
4.1
-
V
1
MCLADJ DC Voltage
(max cable length)
100 meters, 800mV p-p Input
-
3.1
-
V
1
TEST LEVELS
1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges.
2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using correlated
test.
3. Production test at room temperature and nominal supply voltage.
4. QA sample test.
5. Calculated result based on Level 1,2, or 3.
6. Not tested. Guaranteed by design simulations.
7. Not tested. Based on characterization of nominal parts.
8. Not tested. Based on existing design/characterization data of similar product.
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AC ELECTRICAL CHARACTERISTICS - RECLOCKER STAGE
V
CC
= 5V, T
A
= 0C to 70C unless otherwise shown.
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
TEST
LEVEL
Serial Input Data Rate
SMPTE 292M
BR
SDI
1.485/1.001
1.485
-
Gb/s
1
Serial Input Jitter Tolerance
Sinewave Modulation (p p)
J
TOL
-
0.5
-
UI
1
Phase Lock Time -
Asynchronous
Loop bandwidth approximately
1.4MHz @ 0.2 UI input jitter
modulation (LBCONT floating).
T
ALOCK
-
200
250
ms
7
Phase Lock Time -
Synchronous
Loop bandwidth approximately
1.4MHz @ 0.2 UI input jitter
modulation (LBCONT floating).
T
SLOCK
-
2
4
s
7
Carrier Detect Timer
Loop bandwidth approximately
1.4MHz @ 0.2 UI input jitter
modulation (LBCONT floating).
-
12
-
ms
7
Phase Lock/Unlock Timer
(1nF PLCAP)
Loop bandwidth approximately
1.4MHz @ 0.2 UI input jitter
modulation (LBCONT floating).
60
-
-
s
7
Serial Output Signal Swing
V
SDO
320
400
480
mV
1
Serial Digital Output
Rise and Fall Time
t
R-SDO
, t
F-SDO
-
150
270
ps
7
Serial Digital Output
Rise and Fall Time Mismatch
-
-
100
ps
7
Serial Digital Output
Intrinsic Jitter
(RMS Jitter for clean PRN 2
23
1
input on DDI/DDI inputs)
t
IJ
-
10
-
ps
2
Loop bandwidth
@ 0.2UI jitter modulation
LBCONT floating
-
1.4
-
MHz
7
Jitter peaking
-
-
0.1
dB
7
TEST LEVELS
1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges.
2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using correlated
test.
3. Production test at room temperature and nominal supply voltage.
4. QA sample test.
5. Calculated result based on Level 1,2, or 3.
6. Not tested. Guaranteed by design simulations.
7. Not tested. Based on characterization of nominal parts.
8. Not tested. Based on existing design/characterization data of similar product
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AC ELECTRICAL CHARACTERISTICS - EQUALIZER STAGE
V
CC
= 5V, T
A
= 0C to 70C unless otherwise shown.
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
TEST
LEVEL
Equalization
Belden 1694A
-
110
-
m
2
Input Resistance (SDI, SDI)
-
2.8
-
k
7
Input Capacitance (SDI, SDI)
C
IN
-
2.0
-
pF
7
AC ELECTRICAL CHARACTERISTICS - SERIAL TO PARALLEL STAGE
V
CC
= 5V, T
A
= 0C to 70C unless otherwise shown.
PARAMETER
CONDITIONS
SYMBOL
MIN
TYP
MAX
UNITS
TEST
LEVEL
Parallel Output Clock Frequency
SMPTE 292M
P
CLK_OUT
74.25/1.001
74.25
-
MHz
1
Clock Pulse Width Low
15pF load
t
PWL
5
7
-
ns
7
Clock Pulse Width High
15pF load
t
PWH
5
6
-
ns
7
Output signal Rise/Fall time
15pF load
t
r
, t
f
-
2000
4000
ps
7
Output Signal Rise/Fall Time Matching
15pF load
t
rfm
-
1000
2000
ps
7
Output Setup Time
15pF load
t
OD
4
6
-
ns
2
Output Hold Time
15pF load
t
OH
5
7
-
ns
2
TEST LEVELS
1. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges.
2. Production test at room temperature and nominal supply voltage with guardbands for supply and temperature ranges using
correlated test.
3. Production test at room temperature and nominal supply voltage.
4. QA sample test.
5. Calculated result based on Level 1,2, or 3.
6. Not tested. Guaranteed by design simulations.
7. Not tested. Based on characterization of nominal parts.
8. Not tested. Based on existing design/characterization data of similar product.
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