S E M I C O N D U C T O R
1
March 1996
HC-5509B3999-003
SLIC
Subscriber Line Interface Circuit
Features
DI Monolithic High Voltage Process
Compatible with Worldwide PBX and CO Performance
Requirements
Controlled Supply of Battery Feed Current with Pro-
grammable Current Limit
Operates with 5V Positive Supply (V
B+
)
Internal Ring Relay Driver and a Utility Relay Driver
High Impedance Mode for Subscriber Loop
High Temperature Alarm Output
Low Power Consumption During Standby Functions
Switch Hook, Ground Key, and Ring Trip Detection
Selective Power Denial to Subscriber
Voice Path Active During Power Denial
On-Chip Op Amp for 2-Wire Impedance Matching
Applications
Solid State Line Interface Circuit for PBX or Central
Office Systems, Digital Loop Carrier Systems
Hotel/Motel Switching Systems
Direct Inward Dialing (DID) Trunks
Voice Messaging PBXs
High Voltage 2-Wire/4-Wire, 4-Wire/2-Wire Hybrid
Description
The HC-5509B3999-003 telephone Subscriber Line Inter-
face Circuit integrates most of the BORSCHT functions on a
monolithic IC. The device is manufactured in a Dielectric Iso-
lation (DI) process and is designed for use as a high voltage
interface between the traditional telephone subscriber pair
(Tip and Ring) and the low voltage filtering and cod-
ing/decoding functions of the line card. Together with a sec-
ondary protection diode bridge and "feed" resistors, the
device will withstand 1000V lightning induced surges, in
plastic packages. The SLIC also maintains specified trans-
mission performance in the presence of externally induced
longitudinal currents. The BORSCHT functions that the SLIC
provides are:
Battery Feed with Subscriber Loop Current Limiting
Overvoltage Protection
Ring Relay Driver
Supervisory Signaling Functions
Hybrid Functions (with External Op-Amp)
Test (or Battery Reversal) Relay Driver
In addition, the SLIC provides selective denial of power to
subscriber loops, a programmable subscriber loop current
limit from 20mA to 60mA, a thermal shutdown with an alarm
output and line fault protection. Switch hook detection, ring
trip detection and ground key detection functions are also
incorporated in the SLIC device.
The HC-5509B3999-003 SLIC is ideally suited for line card
designs in PBX and CO systems, replacing traditional
transformer solutions.
Pinout
HC-5509B3999-003 (SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HC9P5509B3999-003
0 to +75
28 Ld SOIC
M28.3
BG
RF
TF
VFB
VTX
C
2
VRX
RFS
RING
VB-
DG
28
27
26
24
23
22
21
20
19
18
17
16
15
25
PR
RD
PRI
VB+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AG
RS
ILMT
OUT 1
-IN 1
TIP
F0
C
1
F1
SHD
GKD
TST
ALM
TRUTH TABLE
F1
F0
ACTION
0
0
Normal Loop Feed
0
1
RD Active
1
0
Power Down Latch RESET
1
0
Power on RESET
1
1
Loop Power
Denial Active
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1996
File Number
4126
2
Absolute Maximum Ratings
(Note 1)
Operating Conditions
Relay Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +15V
Maximum Supply Voltages
(V
B+
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
(V
B+
)-(V
B-
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +75V
Junction Temperature Ceramic. . . . . . . . . . . . . . . . . . . . . . . +175
o
C
Junction Temperature Plastic . . . . . . . . . . . . . . . . . . . . . . . . +150
o
C
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300
o
C
(For SOIC - Lead Tips Only)
Operating Temperature Range
HC-5509B3999-003. . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to +75
o
C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65
o
C to +150
o
C
Relay Drivers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5V to +12V
Positive Power Supply (V
B+
) . . . . . . . . . . . . . . . . . . . . . . . . +5V
5%
Negative Power Supply (V
B-
) . . . . . . . . . . . . . . . . . . . . -42V to -58V
Loop Resistance (R
L
) . . . . . . . . . . . . . . . . . 200
to 1750
(Note 2)
Thermal Information
Thermal Resistance (Typical)
JA
(
o
C/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at T
A
= +25
o
C, Min-Max Parameters are Over
Operating Temperature Range, V
B-
= -48V, V
B+
= +5V, AG = DG = BG = 0V. All AC Parameters are
specified at 600
2-Wire Terminating Impedance.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
AC TRANSMISSION PARAMETERS
RX Input Impedance
300Hz to 3.4kHz (Note 3)
-
100
-
k
TX Output Impedance
300Hz to 3.4kHz (Note 3)
-
-
20
4-Wire Input Overload Level
300Hz to 3.4kHz R
L
= 1200
,
600
Reference
+1.5
-
-
V
PEAK
2-Wire Return Loss
Matched for 600
(Note 3)
SRL LO
26
35
-
dB
ERL
30
40
-
dB
SRL HI
30
40
-
dB
2-Wire Longitudinal to Metallic Balance
Off Hook
Per ANSI/IEEE STD 455-1976 (Note 3)
300Hz to 3400Hz
58
63
-
dB
4-Wire Longitudinal Balance
Off Hook
300Hz to 3400Hz (Note 3)
50
55
-
dB
Low Frequency Longitudinal Balance
R.E.A. Test Circuit
-
-
-67
dBmp
I
LINE
= 40mA T
A
= +25
o
C (Note 3)
-
-
23
dBrnC
Longitudinal Current Capability
I
LINE
= 40mA T
A
= +25
o
C (Note 3)
-
-
30
mA
RMS
Insertion Loss
0dBm at 1kHz, Referenced 600
2-Wire/4-Wire
-
0.05
0.2
dB
4-Wire/2-Wire
-
0.05
0.2
dB
4-Wire/4-Wire
-
-
0.2
dB
Frequency Response
300Hz to 3400Hz (Note 3) Referenced to
Absolute Level at 1kHz, 0dBm Referenced
600
7
-
0.02
0.05
dB
Level Linearity
Referenced to -10dBm (Note 3)
2-Wire to 4-Wire and 4-Wire to 2-Wire
+3 to -40dBm
-
-
0.05
dB
-40 to -50dBm
-
-
0.1
dB
-50 to -55dBm
-
-
0.3
dB
Specifications HC-5509B3999-003
3
Absolute Delay
(Note 3)
2-Wire/4-Wire
300Hz to 3400Hz
-
-
1
s
4-Wire/2-Wire
300Hz to 3400Hz
-
-
1
s
4-Wire/4-Wire
300Hz to 3400Hz
-
-
1.5
s
Transhybrid Loss, THL
(Note 3) See Figure 1, V
IN
= 1V
P-P
at 1kHz
32
40
-
dB
Total Harmonic Distortion
2-Wire/4-Wire, 4-Wire/2-Wire, 4-Wire/4-Wire
Reference Level 0dBm at 600
300Hz to 3400Hz (Note 3)
-
-
-52
dB
Idle Channel Noise
(Note 3)
2-Wire and 4-Wire
C-Message
-
-
5
dBrnC
Psophometric
-
-
-85
dBmp
3kHz Flat
-
-
15
dBrn
Power Supply Rejection Ratio
(Note 3)
30Hz to 200Hz, R
L
= 600
V
B+
to 2-Wire
20
29
-
dB
V
B+
to 4-Wire
20
29
-
dB
V
B-
to 2-Wire
20
29
-
dB
V
B-
to 4-Wire
20
29
-
dB
V
B+
to 4-Wire
(Note 3)
200Hz to 16kHz, R
L
= 600
30
-
-
dB
V
B-
to 2-Wire
30
-
-
dB
V
B-
to 4-Wire
20
25
-
dB
V
B-
to 4-Wire
20
25
-
dB
Ring Sync Pulse Width
50
-
500
s
DC PARAMETERS
Loop Current Programming
Limit Range
20
40
60
mA
Accuracy
10
-
-
%
Loop Current During Power Denial
R
L
= 200
-
3
5
mA
Fault Currents
TIP to Ground
-
30
-
mA
RING to Ground
-
60
-
mA
TIP and RING to Ground
-
90
-
mA
Switch Hook Detection Threshold
9.0
12
15
mA
Ground Key Detection Threshold
14.5
10
25.5
mA
Thermal ALARM Output
Safe Operating Die Temperature Exceeded
140
-
160
o
C
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at T
A
= +25
o
C, Min-Max Parameters are Over
Operating Temperature Range, V
B-
= -48V, V
B+
= +5V, AG = DG = BG = 0V. All AC Parameters are
specified at 600
2-Wire Terminating Impedance.
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Specifications HC-5509B3999-003
4
Ring Trip Detection Threshold
V
RING
= 105V
RMS
, f
RING
= 20Hz
-
10
-
mA
Ring Trip Detection Period
-
100
150
ms
Dial Pulse Distortion
-
0.1
0.5
ms
Relay Driver Outputs
On Voltage V
OL
I
OL
(PR) = 60mA, I
OL
(RD) = 30mA
-
0.2
0.5
V
Off Leakage Current
V
OH
= 13.2V
-
10
100
A
TTL/CMOS Logic Inputs (F0, F1, RS, TEST, PRI)
Logic `0' V
IL
-
-
0.8
V
Logic `1' V
IH
2.0
-
5.5
V
Input Current (F0, F1, RS, TEST, PRI)
0V
V
IN
5V
-
-
100
A
Logic Outputs
Logic `0' V
OL
I
LOAD
= 800
A
-
0.1
0.5
V
Logic `1' V
OH
I
LOAD
= 40
A
2.7
-
-
V
Power Dissipation On Hook
Relay Drivers Off
-
200
-
mW
I
B+
V
B+
= +5.25V, V
B-
= -58V, R
LOOP
=
-
-
6
mA
I
B-
V
B+
= +5.25V, V
B
- = -58V, R
LOOP
=
-6
-
-
mA
UNCOMMITED OP AMP PARAMETERS
Input Offset Voltage
-
5
-
mV
Input Offset Current
-
10
-
nA
Differential Input Resistance
(Note 3)
-
1
-
M
Output Voltage Swing
R
L
= 10k
-
3
-
V
P-P
Small Signal GBW
(Note 3)
-
1
-
MHz
NOTES:
1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired.
Functional operability under any of these conditions is not necessarily implied.
2. May Be Extended to 1900
With Application Circuit.
3. These parameters are controlled by design or process parameters and are not directly tested. These parameters are characterized upon
initial design release, upon design changes which would affect these characteristics, and at intervals to assure product quality and
specification compliance.
Electrical Specifications
Unless Otherwise Specified, Typical Parameters are at T
A
= +25
o
C, Min-Max Parameters are Over
Operating Temperature Range, V
B-
= -48V, V
B+
= +5V, AG = DG = BG = 0V. All AC Parameters are
specified at 600
2-Wire Terminating Impedance.
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Specifications HC-5509B3999-003
5
Pin Descriptions
SOIC
SYMBOL
DESCRIPTION
1
AG
Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive
input terminals.
2
VB+
Positive Voltage Source - most positive supply.
3
C
1
Capacitor #C
1
- An external capacitor to be connected between this terminal and analog ground. Required for
proper operation of the loop current limiting function.
4
F1
Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally se-
lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on page1. F1 should
be toggled high after power is applied.
5
F0
Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally se-
lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on page 1.
6
RS
Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse
(50 - 500
s) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip
side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected
systems, on the positive going zero crossing. This ensures that the ring delay activates and deactivates when
the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5.
7
SHD
Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output.
8
GKD
Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output.
9
TST
A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper
F1, F0 state is set and will keep ALM low. See Truth Table on page 1.
10
ALM
A LS TTL compatible active low output which responds to the thermal detector circuit when a safe operating
die temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low
until the proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to
power down the part when a thermal fault is detected and then reset with F0, F1. See Truth Table on page 1.
It is possible to ignore transient thermal overload conditions in the SLIC by delaying the response to the TST
pin from the ALM. Care must be exercised in attempting this as continued thermal overstress may reduced
component life.
11
I
LMT
Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage
divider.
12
OUT1
The analog output of the spare operational amplifier.
13
-IN1
The inverting analog input of the spare operational amplifier.
14
TIP
An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and
ring relay contact. Functions with the RING terminal to receive voice signals from the telephone and for loop
monitoring purpose.
15
RING
An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor.
Functions with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes.
16
RFS
Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected ringing the
ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing, the RF and RFS pins
must be shorted.
17
VRX
Receive Input, 4-Wire Side - A high impedance analog input. AC signals appearing at this input drive the Tip
Feed and Ring Feed amplifiers differentially.
18
C
2
Capacitor #C
2
- An external capacitor to be connected between this terminal and ground. It prevents false ring
trip detection from occurring when longitudinal currents are induced onto the subscriber loop from power lines
and other noise sources. This capacitor should be nonpolarized.
19
VTX
Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage across
TIP and RING. Transhybrid balancing must be performed beyond this output to completely implement 2-Wire
to 4-Wire conversion. This output is referenced to analog ground. Since the DC level of this output varies with
loop current, capacitive coupling to the next stage is necessary.
HC-5509B3999-003
6
20
PRI
A TTL compatible input used to control PR. PRI active High = PR active low.
21
PR
An active low open collector output. Can be used to drive a Polarity Reversal Relay.
22
DG
Digital Ground - To be connected to zero potential. Serves as a reference for all digital inputs and outputs on
the SLIC.
23
RD
Ring Relay Driver - An active low open collector output. Used to drive a relay that switches ringing signals onto
the 2-Wire line.
24
VFB
Feedback input to the tip feed amplifier; may be used in conjunction with transmit output signal and the spare
op amp to accommodate 2-Wire line impedance matching.
25
TF
2
Tip Feed - A low impedance analog output connected to the TIP terminal through a feed resistor. Functions
with the RF terminal to provide loop current, and to feed voice signals to the telephone set and to sink longitu-
dinal currents. Must be tied to TF
1
.
NA
TF
1
Tie directly to TF
2
in the PLCC application.
26
RF
1
Ring Feed - A low impedance analog output connected to the RING terminal through a feed resistor. Functions
with the TF terminal to provide loop current, feed voice signals to the telephone set, and to sink longitudinal
currents. Tie directly to RF
2
.
NA
RF
2
Tie directly to RF
1
in the PLCC application.
27
VB-
The battery voltage source. The most negative supply.
28
BG
Battery Ground - To be connected to zero potential. All loop current and some quiescent current flows into this
ground terminal.
NC
No internal connection.
NOTE:
1. All grounds (AG, BG, DG) must be applied before V
B+
or V
B-
. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
Pin Descriptions
(Continued)
SOIC
SYMBOL
DESCRIPTION
HC-5509B3999-003
7
Functional Diagram
SOIC
Die Characteristics
Transistor Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 224
Diode Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Die Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .174 x 120
Substrate Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Connected
Process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bipolar-DI
Overvoltage Protection and Longitudinal
Current Protection
The SLIC device, in conjunction with an external protection
bridge, will withstand high voltage lightning surges and
power line crosses.
High voltage surge conditions are as specified in Table 1.
The SLIC will withstand longitudinal currents up to a
maximum or 30mA
RMS
, 15mA
RMS
per leg, without any
performance degradation.
R
2R
C
1
+
R
VRX
OUT 1
2R
R/2
TIP
+
TA
R
2R
2R
R
+
90k
RING
RFS
+
LA
4.5k
25k
25k
100k
100k
4.5k
90k
RF
25
17
12
RF
1
TF
14
RF
15
16
26
3
SHD
FAULT
DET
C
2
I
LMT
OP AMP
+
VFB
VTX
+
RTD
GKD
GM
18
11
RF
2
BIAS
NETWORK
DG
AG
VB+
IIL LOGIC INTERF
A
C
E
TSD
GK
RFC
SW
F0
F1
RS
PRI
PR
ALM
GKD
SHD
RD
TST
VB-
REF
VB/2
-IN 1
13
24
19
2
22
1
TF
BG
28
27
4
5
6
9
20
21
23
7
8
10
THERM
LTD
R = 108k
90k
R
R
100k
100k
90k
-
-
-
-
-
-
TABLE 1.
PARAMETER
TEST
CONDITION
PERFOR-
MANCE (MAX)
UNITS
Longitudinal Surge
10
s Rise/
1000
s Fall
1000 (Plastic)
V
PEAK
Metallic Surge
10
s Rise/
1000
s Fall
1000 (Plastic)
V
PEAK
T/GND
R/GND
10
s Rise/
1000
s Fall
1000 (Plastic)
V
PEAK
50/60Hz Current
T/GND
R/GND
11 Cycles
Limited to
10A
RMS
700 (Plastic)
V
RMS
HC-5509B3999-003
8
Logic Diagram
TO BIAS
NETWORK
RD
THERMAL
SHUT DOWN
ALM
SHD
GKD
TEST
F1
SH
PD
F0
GK
RS
TO TTL
I
2
L
TO TTL
I
2
L
TO TTL
I
2
L
THERMAL
SHUT
DOWN
LATCH
KEY
A
B
C
A
B
C
RELAY
DRIVER
TTL TO I
2
L
TTL TO I
2
L
TTL TO I
2
L
TTL TO I
2
L
INJ
HC-5509B3999-003
9
TYPICAL COMPONENT VALUES
C
1
= 0.5
F, 30V
C
2
= 0.5
F-1.0
F
10%, 20V (Should be nonpolarized)
C
3
= 0.01
F, 100V,
20%
C
4
= 0.01
F, 100V,
20%
C
5
= 0.01
F, 100V,
20%
C
AC
= 0.5
F, 20V
KZ
0
= 60k
, (Z
0
= 600
, K = Scaling Factor = 100)
R
L1
, R
L2
; Current Limit Setting Resistors:
R
L1
+ R
L2
> 90k
offset
I
LIMIT
= (0.6) (R
L1
+ R
L2
)/(200 x R
L2
), R
L1
typically 100k
K
RF
= 20k
, RF = 2(R
B2
+ R
B4
), K = Scaling Factor = 100)
R
B1
= R
B2
= R
B3
= R
B4
= 50
(1% absolute, matching
requirements covered in a Tech Brief)
R
S1
= R
S2
= 1k
typically
C
S1
= C
S2
= 0.1
F, 200V typically, depending on V
Ring
and
line length.
Z
1
= 150V to 200V transient protector. PTC used as ring
generator ballast.
NOTES:
1. All grounds (AG, BG, & DG) must be applied before V
B
+ or V
B
-. Failure to do so may result in premature failure of the part. If a user wishes
to run separate grounds off a line card, the AG must be applied first.
2. Application shows Ring Injected Ringing, a Balanced or Tip injected configuration may be used.
3. Secondary protection diode bridge recommended is 3A, 200V type.
Additional information is contained in Application Note 549, "The HC-550X Telephone SLICs" By Geoff Phillips
Applications Diagram
FIGURE 1. TYPICAL LINE CIRCUIT APPLICATION WITH THE MONOLITHIC SLIC
VB-
BG C
2
DG
AG VB+ C
1
R
B4
C
3
C
4
+5V
I
LIMIT
VRX+
VFB
VTX
-IN1
OUT1
R
L1
C
AC
K
Z0
FROM PCM
FILTER/CODER
SYSTEM CONTROLLER
PRI RS
F1
F0
SHD GKD
TEST
ALARM
R
B3
RING
R
B1
K
1A
TIP
R
S1
C
S1
PTC
Z
1
PRIMARY
PROTECTION
K
2
K
1
+5V
+5V
K
IB
150V
PEAK
(MAX)
V
RING
R
S2
C
S2
RFS
RING
TIP
PR
RD
R
B2
VB-
C
5
K
RF
R
L2
SECONDARY
PROTECTION
TO HYBRID
BALANCE
NETWORK
SLIC
(NOTE 3)
HC-5509B3999-003
HC-5509B3999-003
10
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at
any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is
believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other
rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
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EUROPE
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ASIA
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FAX: (65) 748-0400
S E M I C O N D U C T O R
HC-5509B3999-003
NOTES:
1. Symbols are defined in the "MO Series Symbol List" in Section
2.2 of Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension "D" does not include mold flash, protrusions or gate
burrs. Mold flash, protrusion and gate burrs shall not exceed
0.15mm (0.006 inch) per side.
4. Dimension "E" does not include interlead flash or protrusions. In-
terlead flash and protrusions shall not exceed 0.25mm (0.010
inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual
index feature must be located within the crosshatched area.
6. "L" is the length of terminal for soldering to a substrate.
7. "N" is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width "B", as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch)
10. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are not necessarily exact.
INDEX
AREA
E
D
N
1
2
3
-B-
0.25(0.010)
C A
M
B S
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
0.25(0.010)
B
M
M
Small Outline Plastic Packages (SOIC)
M28.3
(JEDEC MS-013-AE ISSUE C)
28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES
MILLIMETERS
NOTES
MIN
MAX
MIN
MAX
A
0.0926
0.1043
2.35
2.65
-
A1
0.0040
0.0118
0.10
0.30
-
B
0.013
0.0200
0.33
0.51
9
C
0.0091
0.0125
0.23
0.32
-
D
0.6969
0.7125
17.70
18.10
3
E
0.2914
0.2992
7.40
7.60
4
e
0.05 BSC
1.27 BSC
-
H
0.394
0.419
10.00
10.65
-
h
0.01
0.029
0.25
0.75
5
L
0.016
0.050
0.40
1.27
6
N
28
28
7
0
o
8
o
0
o
8
o
-
Rev. 0 12/93
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