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Электронный компонент: MAX9179

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General Description
The MAX9179 is a quad low-voltage differential
signaling (LVDS) line receiver designed for applications
requiring high data rates, low power dissipation, and
noise immunity. The receiver accepts four LVDS input
signals and translates them to 3.3V LVCMOS output lev-
els at speeds up to 400Mbps. The receiver features
built-in hysteresis, which improves noise immunity and
prevents multiple switching on slow transitioning inputs.
The device supports a wide 0.038V to 2.362V common-
mode input voltage range, allowing for ground potential
differences and common-mode noise between the driver
and the receiver. A fail-safe circuit sets the output high
when the input is open, undriven and shorted, or undriven
and terminated. Common enable inputs control the high-
impedance outputs.
The MAX9179 has a flow-through pinout for easy PC
board layout, and is pin compatible with the MAX9121
and the DS90LV048A with the additional features of
high ESD tolerance and built-in hysteresis.
The MAX9179 operates from a single 3.3V supply, and is
specified for operation from -40C to +85C. The device
is offered in 16-pin TSSOP and thin QFN packages.
Applications
Laser Printers
Digital Copiers
Cell-Phone Base Stations
Telecom Switching Equipment
LCD Displays
Network Switches/Routers
Backplane Interconnect
Clock Distribution
Features
o Guaranteed 400Mbps Data Rate
o 50mV (typ) Hysteresis
o Overshoot/Undershoot Protection (-1.0V or V
CC
+
1.0V) on Enables
o IEC61000-4-2 Level 4 ESD Tolerance
o AC Specifications Guaranteed with |V
ID
|
=
100mV
o Single 3.3V Supply
o Fail-Safe Circuit
o Flow-Through Pinout
Simplifies PC Board Layout
Reduces Crosstalk
o Low-Power CMOS Design
o Conforms to ANSI TIA/EIA-644 LVDS Standard
o High-Impedance Inputs when Powered Off
o Pin Compatible with the MAX9121 and the
DS90LV048A
o Small Thin QFN Package Available
MAX9179
Quad LVDS Receiver with Hysteresis
________________________________________________________________ Maxim Integrated Products
1
Ordering Information
19-2752; Rev 0; 2/03
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
PART
TEMP RANGE
PIN-PACKAGE
MAX9179EUE
-40
C to +85C
16 TSSOP
MAX9179ETE*
-40
C to +85C
16 Thin QFN-EP**
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
IN1-
EN
OUT1
OUT2
V
CC
GND
OUT3
OUT4
TOP VIEW
MAX9179
TSSOP
THIN QFN
(LEADS UNDER PACKAGE)
EN
IN1+
IN2+
IN3+
IN2-
IN3-
IN4+
IN4-
IN2+
IN2-
IN3-
IN3+
OUT4
IN4-
IN4+
OUT2
V
CC
GND
OUT3
EN
OUT1
IN1-
IN1+
EN
MAX9179
EXPOSED PAD
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Pin Configurations
Functional Diagram appears at end of data sheet.
*Future product--contact factory for availability.
**EP = Exposed paddle.
MAX9179
Quad LVDS Receiver with Hysteresis
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, differential input voltage |V
ID
| = 0.075V to 1.2V, input common-mode voltage V
CM
= |V
ID
/2| to 2.4V - |V
ID
/2|,
T
A
= -40C to +85C, unless otherwise noted. Typical values are at V
CC
= 3.3V, |V
ID
| = 0.2V, V
CM
= 1.2V, T
A
= +25C.) (Notes 1, 2)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC
to GND ...........................................................-0.3V to +4.0V
IN_+, IN_- to GND .................................................-0.3V to +4.0V
EN, EN to GND ...........................................-1.4V to (V
CC
+ 1.4V)
OUT_ to GND .............................................-0.3V to (V
CC
+ 0.3V)
Continuous Power Dissipation (T
A
= +70C)
16-Pin TSSOP (derate 9.4mW/C above +70C) .........755mW
16-Pin Thin QFN (derate 16.9mW/C
above +70C).............................................................1349mW
Junction Temperature ......................................................+150C
Storage Temperature Range .............................-65C to +150C
ESD Protection
Human Body Model (R
D
= 1.5k
, C
S
= 100pF)
(IN_+, IN_-) ................................................................16kV
IEC61000-4-2 (R
D
= 330
, C
S
= 150pF) (IN_+, IN_-)
Contact Discharge .......................................................8kV
Air-Gap Discharge .....................................................15kV
Soldering Temperature (soldering, 10s) ..........................+300C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUTS (IN_+, IN_-)
Differential Input High Threshold
V
TH
Figure 1
25
75
mV
Differential Input Low Threshold
V
TL
Figure 1
-75
-25
mV
Hysteresis
V
TH
- V
TL
Figure 1
50
mV
Input Current
I
IN+,
I
IN-
-20
+20
A
Power-Off Input Current
I
OFF+,
I
OFF-
V
CC
= 0V
-20
+20
A
Fail-Safe Input Resistor 1
R
IN1
V
CC
= 3.6V or 0V, Figure 2
40
65
k
Fail-Safe Input Resistor 2
R
IN2
V
CC
= 3.6V or 0V, Figure 2
280
455
k
OUTPUTS (OUT_)
Open, undriven short, or
undriven parallel
termination
Output High Voltage
V
OH
I
OH
= -4.0mA
V
ID
= +50mV
V
CC
-
0.2
V
CC
-
0.1
V
Output Low Voltage
V
OL
I
OL
= 4.0mA, V
ID
= -50mV
0.1
0.25
V
Output Short-Circuit Current
I
OS
Enabled, V
ID
= +50mV, V
OUT
= 0 (Note 3)
-40
-70
-120
mA
Output High-Impedance Current
I
OZ
Disabled, V
OUT
= 0 or V
CC
-1.0
+1.0
A
ENABLE INPUTS (EN,
EN)
Input High Voltage
V
IH
2.0
V
CC
+
1.0
V
Input Low Voltage
V
IL
-1.0
+0.8
V
-1.0V
EN, EN 0V
-1800
+10
0V
EN, EN V
CC
-20
+20
Input Current
I
IN
V
CC
EN, EN V
CC
+ 1.0V
-10
+1800
A
POWER SUPPLY
Supply Current
I
CC
Enabled, inputs open
10.4
15
Disabled Supply Current
I
CCZ
Disabled, inputs open
0.6
1.0
mA
MAX9179
Quad LVDS Receiver with Hysteresis
_______________________________________________________________________________________
3
Note 1: Maximum and minimum limits over temperature are guaranteed by design and characterization. Parts are production
tested at T
A
= +25C.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
, V
TL
, and V
ID
.
Note 3:
Short one output at a time.
Note 4:
AC parameters are guaranteed by design and characterization. Limits are set at 6 sigma.
Note 5: C
L
includes scope probe and test jig capacitance.
Note 6: Pulse generator differential output for all tests (unless otherwise noted): t
R
= t
F
< 1ns (0% to 100%), frequency = 100MHz,
50% duty cycle.
Note 7: t
SKD1
is the magnitude of the difference of the differential propagation delays in a channel. t
SKD1
= | t
PHLD
- t
PLHD
|.
Note 8: t
SKD2
is the magnitude of the difference of the t
PLHD
or t
PHLD
of one channel and the t
PLHD
or t
PHLD
of the other channel
on the same part.
Note 9: t
SKD3
is the magnitude of the difference of any differential propagation delays between parts at the same V
CC
and within
5C of each other.
Note 10: t
SKD4
is the magnitude of the difference of any differential propagation delays between parts operating over the rated
supply and temperature ranges.
Note 11: Pulse generator output for t
PHZ
, t
PLZ
, t
PZH
, and t
PZL
tests: t
R
= t
F
= 1.5ns (0.2V
CC
to 0.8V
CC
), 50% duty cycle, V
OH
=
V
CC
+ 1.0V settling to V
CC
, V
OL
= -1.0V settling to 0, frequency = 1MHz.
AC ELECTRICAL CHARACTERISTICS
(V
CC
= 3.0V to 3.6V, C
L
= 15pF, differential input voltage |V
ID
| = 0.1V to 1.2V, input common-mode voltage V
CM
= |V
ID
/2| to 2.4V - |V
ID
/2|,
T
A
= -40C to +85C, unless otherwise noted. Typical values are at V
CC
= 3.3V, |V
ID
| = 0.2V, V
CM
= 1.2V, T
A
= +25C.) (Notes 4, 5, 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Differential Propagation Delay
High to Low
t
PHLD
Figures 3, 4
2.0
2.6
4.6
ns
Differential Propagation Delay
Low to High
t
PLHD
Figures 3, 4
2.0
2.52
4.6
ns
|V
ID
| = 0.1V to 0.15V
700
|V
ID
| = 0.15V to 0.2V
400
Differential Pulse Skew
| t
PHLD
- t
PLHD
| (Note 7)
t
SKD1
|V
ID
| = 0.2V to 1.2V
80
300
ps
|V
ID
| = 0.1V to 0.15V
900
|V
ID
| = 0.15V to 0.2V
600
Differential Channel-to-Channel
Skew, Same Part
(Note 8)
t
SKD2
|V
ID
| = 0.2V to 1.2V
120
400
ps
Differential Part-to-Part Skew
(Note 9)
t
SKD3
2.0
ns
Differential Part-to-Part Skew
(Note 10)
t
SKD4
2.6
ns
Rise Time
t
TLH
0.77
1.4
ns
Fall Time
t
THL
0.74
1.4
ns
Disable Time High to Z
t
PHZ
R
L
= 2k
, Figures 5, 6 (Note 11)
10.6
14
ns
Disable Time Low to Z
t
PLZ
R
L
= 2k
, Figures 5, 6 (Note 11)
11
14
ns
Enable Time Z to High
t
PZH
R
L
= 2k
, Figures 5, 6 (Note 11)
4.8
14
ns
Enable Time Z to Low
t
PZL
R
L
= 2k
, Figures 5, 6 (Note 11)
4.8
14
ns
Maximum Operating Frequency
f
MAX
All channels switching, C
L
= 15pF, V
OL
(max) = 0.25V, V
OH
(min) = V
CC
- 0.2V,
44%
< duty cycle < 56%
200
250
MHz
MAX9179
Quad LVDS Receiver with Hysteresis
4
_______________________________________________________________________________________
Test Circuits/Timing Diagrams
V
OUT
V
OH
V
TL
-V
ID
+V
ID
V
OL
V
TH
HYSTERESIS
V
ID
= 0
Figure 1. Input Thresholds and Hysteresis
V
CC
V
CC
- 0.3V
R
IN2
R
IN1
R
IN1
IN_+
OUT_
IN_-
Figure 2. Fail-Safe Input Circuit
OUT_
C
L
50
50
IN_-
IN_+
PULSE
GENERATOR
Figure 3. Propagation Delay and Transition Time Test Circuit
0.9V
CC
0.5V
CC
0.1V
CC
0.9V
CC
0.5V
CC
0.1V
CC
IN_-
IN_+
(0V DIFFERENTIAL)
V
ID
t
PHLD
t
PLHD
t
TLH
t
THL
V
CM
= ((V
IN_+
) + (V
IN_-
))/2
OUT_
Figure 4. Propagation Delay and Transition Time Waveforms
50
PULSE
GENERATOR
C
L
INCLUDES LOAD AND TEST JIG CAPACITANCE.
S
1
= V
CC
FOR t
PZL
AND t
PLZ
MEASUREMENTS.
S
1
= 0 FOR t
PZH
AND t
PHZ
MEASUREMENTS.
DEVICE
UNDER
TEST
EN
EN
IN_+
V
CC
S
1
R
L
C
L
OUT_
IN_-
Figure 5. High-Impedance Delay Test Circuit
V
CC
+ 1.0V
V
CC
0
-1.0V
V
CC
+ 1.0V
V
CC
0
-1.0V
V
CC
V
OL
V
OH
0
EN WHEN EN = LOW OR OPEN
EN WHEN EN = HIGH
OUT_ WHEN V
ID
= -75mV
OUT_ WHEN V
ID
= +75mV
1.5V
1.5V
1.5V
1.5V
t
PZL
t
PLZ
t
PHZ
t
PZH
0.5V
0.5V
50%
50%
Figure 6. High-Impedance Delay Waveforms
Typical Operating Characteristics
(V
CC
= 3.3V, V
CM
= 1.2V, |V
ID
| = 0.15V, C
L
= 15pF, f = 100MHz, T
A
= +25C, unless otherwise noted.)
MAX9179
Quad LVDS Receiver with Hysteresis
_______________________________________________________________________________________
5
SUPPLY CURRENT vs. FREQUENCY
MAX9179 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
300
250
200
150
100
50
30
50
70
90
110
10
0
350
ALL CHANNELS DRIVEN
SUPPLY CURRENT
vs. TEMPERATURE
MAX9179 toc02
TEMPERATURE (
C)
SUPPLY CURRENT (mA)
60
35
10
-15
6
8
10
12
14
16
4
-40
85
INPUTS OPEN
DC DIFFERENTIAL THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
MAX9179 toc03
SUPPLY VOLTAGE (V)
DC DIFFERENTIAL THRESHOLD VOLTAGE (mV)
3.5
3.4
3.1
3.2
3.3
-30
-20
-10
0
10
20
30
40
-40
3.0
3.6
V
TH
V
TL
OUTPUT SHORT-CIRCUIT CURRENT
vs. SUPPLY VOLTAGE
MAX9179 toc04
SUPPLY VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
3.5
3.4
3.3
3.2
3.1
-40
-60
-80
-100
-20
3.0
3.6
DC INPUT
(V
ID
= +150mV)
OUTPUT HIGH VOLTAGE
vs. SUPPLY VOLTAGE
MAX9179 toc05
SUPPLY VOLTAGE (V)
OUTPUT HIGH VOLTAGE (V)
3.5
3.4
3.3
3.2
3.1
2.8
3.0
3.2
3.4
3.6
2.6
3.0
3.6
DC INPUT
(V
ID
= +150mV)
I
OH
= -4mA
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX9179 toc07
SUPPLY VOLTAGE (V)
DIFFERENTIAL PROPAGATION DELAY (ns)
3.5
3.4
3.3
3.2
3.1
2.2
2.4
2.6
2.8
3.0
3.2
2.0
3.0
3.6
t
PHLD
t
PLHD
OUTPUT LOW VOLTAGE
vs. SUPPLY VOLTAGE
MAX9179 toc06
SUPPLY VOLTAGE (V)
OUTPUT LOW VOLTAGE (mV)
3.5
3.4
3.3
3.2
3.1
100
110
120
130
140
90
3.0
3.6
DC INPUT
(V
ID
= -150mV)
I
OL
= 4mA