1996 Microchip Technology Inc.
DS30139I-page 1
This document includes the programming
specifications for the following devices:
1.0
PROGRAMMING THE PIC17CXX
The PIC17CXX is programmed using the TABLWT
instruction. The table pointer points to the internal
EPROM location start. Therefore, a user can program
an EPROM location while executing code (even from
internal EPROM). This programming specification
applies to PIC17CXX devices in all packages.
For the convenience of a programmer developer, a
"program & verify" routine is provided in the on-chip test
program memory space, the program resides in ROM
and not EPROM. Therefore, it is not erasable. The
"program/verify" routine allows the user to load any
address, program a location, verify a location or incre-
ment to the next location. It allows variable program-
ming pulse width.
1.1
Hardware Requirements
Since the PIC17CXX under programming is actually
executing code from "boot ROM," a clock must be pro-
vided to the part. Furthermore, the PIC17CXX under
programming may have any oscillator configuration
(EC, XT, LF or RC). Therefore, the external clock driver
must be able to overdrive pulldown in RC mode. CMOS
drivers are required since the OSC1 input has a
Schmitt trigger input with levels (typically) of 0.2V
DD
and 0.8V
DD
. See the PIC17C4X data sheet
(DS30412A) for exact specifications.
PIC17C42
PIC17C42A
PIC17CR42
PIC17C43
PIC17CR43
PIC17C44
Pin Diagram
The PIC17CXX requires two programmable power
supplies, one for V
DD
(2.5V to 6.0V recommended) and
one for V
PP
(13
0.25V). Both supplies should have a
minimum resolution of 0.25V.
The PIC17CXX uses an intelligent algorithm. The algo-
rithm calls for program verification at V
DD
min as well as
V
DD
max. Verification at V
DD
min guarantees good
"erase margin". Verification at V
DD
max guarantees
good "program margin". Three times (3X) additional
pulses will increase program margin then beyond V
DD
(max.) and insure safe operation in user system.
RC1/AD1
RD0/AD8
RD1/AD9
RD2/AD10
RD3/AD11
RD4/AD12
RD5/AD13
RD6/AD14
RD7/AD15
MCLR/V
PP
V
SS
RE0/ALE
RE1/OE
RE2/WR
TEST
RA0/INT
RA1/T0CKI
RA2
RA3
RA4/RX/DT
RA5/TX/CK
V
DD
RC0/AD0
RC2/AD2
RC3/AD3
RC4/AD4
RC5/AD5
RC6/AD6
RC7/AD7
V
SS
RB0/CAP1
RB1/CAP2
RB2/PWM1
RB3/PWM2
RB4/TCLK12
RB5/TCLK3
RB6
RB7
OSC1/CLKIN
OSC2/CLKOUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
PIC17CXX
40L PDIP, Windowed CERDIP
PIC17CXX
EPROM Memory Programming Specification
PIN DESCRIPTIONS (DURING PROGRAMMING): PIC17C42/42A/43/44
Pin Name
During Programming
Pin Name
Pin Type
Pin Description
RA <0:4>
RA <0:4>
I
Necessary in programming mode
TEST
TEST
I
Must be set to "high" to enter programming mode
RB <7:0>
PAD <15:8>
I/O
Address & data: high byte
RC <7:0>
PAD <7:0>
I/O
Address & data: low byte
MCLR/V
PP
V
PP
P
Programming Power
V
DD
V
DD
P
Power Supply
V
SS
V
SS
P
Ground
Legend: I = Input, O = Output, P = Power
This document was created with FrameMaker 4 0 4
PIC17CXX
DS30139I-page 2
1996 Microchip Technology Inc.
The actual programming must be done with V
DD
in the
V
DDP
range (4.75 - 5.25V).
V
DDP
=V
DD
range required during programming.
V
DD
min.=minimum operating V
DD
spec for the part.
V
DD
max.=maximum operating V
CC
spec for the part.
Programmers must verify the PIC17CXX at its speci-
fied V
DD
max and V
DD
min levels. Since Microchip may
introduce future versions of the PIC17CXX with a
broader V
DD
range, it is best that these levels are user
selectable (defaults are ok).
2.0
PROGRAM MODE ENTRY
To execute the programming routine, the user must
hold TEST pin high, RA2, RA3 must be low and RA4
must be high (after power-up) while keeping MCLR low
and then raise MCLR pin from V
IL
to V
DD
or V
PP
. This
will force FFE0h in the program counter and execution
will begin at that location (the beginning of the boot
code) following reset. Execution is forced to Internal
mode by overriding the fuse configuration. The code
protect bit is not overwritten. The program immediately
polls PORT RB<7:0> to determine a branch address.
Presenting E1h on PORT RB will cause the program to
jump to and execute the "program/verify" routine.
Note:
Any programmer not meeting these
requirements may only be classified as
"prototype" or "development" programmer
but not a "production" quality programmer.
All unused pins during programming are in high imped-
ance state.
PORTB (RB) has internal weak pull-ups which are
active during the programming mode. When TEST pin
is high, Power-up timer (PWRT) and Oscillator Start-up
Timers (OST) are disabled.
2.1
Program/Verify Mode
The program/verify mode is intended for full-feature
programmers. This mode offers the following capabili-
ties:
a)
Load any arbitrary 16-bit address to start pro-
gram and/or verify at that location.
b)
Increment address to program/verify the next
location.
c)
Allows arbitrary length programming pulse width.
d)
Following a "verify" allows option to program the
same location or increment and verify the next
location.
e)
Following a "program" allows options to program
the same location again, verify the same loca-
tion or to increment and verify the next location.
Note:
The OSC must not have 72 osc clocks
while the device MCLR is between V
IL
and
V
IHH
.
FIGURE 2-1:
PROGRAMMING/VERIFY STATE DIAGRAM
Increment
Address
Program
Verify
Pulse RA1
(Raise RA1
after RA0
)
Pulse RA0
(RA0 pulse
width is
programming time)
Pulse
RA1
Pulse
RA1
RA0
Raise RA1
before RA0
Load
Address
Jump to
Program
Routine
Reset
Pulse
RA1
1996 Microchip Technology Inc.
DS30139I-page 3
EPROM Memory Programming Specification
2.1.1
LOADING NEW ADDRESS
The program allows new address to be loaded right out
of reset. A 16-bit address is presented on ports RB
(high byte) and RC (low byte) and the RA1 is pulsed
(0
1, then 1
0). The address is latched on the ris-
ing edge of RA1. See timing diagrams for details. After
loading an address, the program automatically goes
into a "verify cycle". To load a new address at any time,
the PIC17C4X must be reset and the programming
mode re-entered.
2.1.2
VERIFY (OR READ) MODE
"Verify mode" can be entered from "Load address"
mode, "program mode" or "verify mode". In verify mode
pulsing RA1 will turn on PORTS RB and RC output
drivers and output the 16-bit value from the current
location. Pulsing RA1 again will increment location
count and be ready for the next verify cycle. Pulsing
RA0 will begin a program cycle.
2.1.3
PROGRAM CYCLE
"Program cycle" is entered from "verify cycle" or pro-
gram cycle" itself. After a verify, pulsing RA0 will begin
a program cycle. 16-bit data must be presented on
PORTS RB (high byte) and RC (low byte) before RA0
is raised.
The data is sampled 3 T
CY
cycles after the rising edge
of RA0. Programming continues for the duration of RA0
pulse.
At the end of programming the user can choose one of
three different routes. If RA1 is kept low and RA0 is
pulsed again, the same location will be programmed
again. This is useful for applying over programming
pulses. If RA1 is raised before RA0 falling edge, then a
verify cycle is started without address increment. Rais-
ing RA1 after RA0 goes low will increment address and
begin verify cycle on the next address.
FIGURE 2-2:
PIC17C4X PROGRAM MEMORY MAP
On chip
Program
EPROM
Configuration
Word
FOSC0
FOSC1
WDTPS0
WDTPS1
PM0
PM1
PM2*
Reserved
Reserved
Reserved
FE00
FE01
FE02
FE03
FE04
FE05
FE06
FE07
FE08
FE09
FE0F
Reserved
0000
07FF
FE00
FE0F
FFFF
*This location does not exist for PIC17C42
PIC17CXX
DS30139I-page 4
1996 Microchip Technology Inc.
3.0
PROGRAMMING SPECIFICATIONS
FIGURE 3-1:
PROGRAMMING ROUTINE FLOWCHART
If programming is desired,
force port B = MSB of data
force port C = LSB of data
(hold 10Tcyc after
RA0 is raised)
Present address on ports
RB, RC hold Tcy
after RA1 changes to 1
Reset
RA2 = 0
RA3 = 0
RA4 = 1
MCLR = 1
B port = 0xE1
(hold for 10 Tcy)
RA1
= 0
No
RA1
= 1
Yes
Stop driving address
on port
RA1
= 0
No
RA1
= 1
No
Yes
Yes
B port = MSB of Data
C port = LSB of Data
Read MSB of data
from port-B.
Read LSB of data
from port-C.
Enable RA0 to end
prog cycle
RA0 = 0
No
RA1
= 0
Yes
Yes
No
RA0= 1
RA1
= 1
No
No
Yes
RA0= 1
RA1
= 1
Yes
Yes
No
No
Yes
RA1
= 0
No
Yes
RA1
= 1
No
Yes
RA1
= 0
No
Yes
- B port is forced by the part
B port = xxx
- B port is tri-state, should be forced by user
Min RA1 high or low = 10 Tcy
Yes
No
B port = xxx
Increment
Address
Program 16 bit
data
B & C ports not
driven by part
1996 Microchip Technology Inc.
DS30139I-page 5
EPROM Memory Programming Specification
FIGURE 3-2:
RECOMMENDED PROGRAMMING ALGORITHM FOR USER EPROM
Start
Pass
Blank
check?
Yes
Yes
No
No
Pass?
Pulse-
count
>25
No
Apply (3 x Pulse-count)
more 100 s programming
pulses for margin
(Over programming)
Load new address
Pulse-count = 0
Pass?
No
Yes
Verify blank
Issue "Blank check fail"
error message
Load new data
Set V
DD
= V
DDP
Verify location for
correct data
Program using 100s
pulse increment
pulse-count
Location fails
programming, issue error
message "Unable to
program location"
Set V
DD
= V
DD
min
Verify location
Programming error:
Issue error message
"Fail verify @ V
DD
min/max"
Set V
DD
= V
DD
min
Set V
DD
= V
DD
max.
Verify location(s)
Set V
DD
= V
DD
max
Set V
DD
= V
DD
min
Set V
DD
= V
DD
min
"Fail verify @ V
DD
min/max"
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