828
Audio ICs
RDS / RBDS decoder
BU1923 / BU1923F
The BU1923 and BU1923F are RDS / RBDS decoders that employ a digital PLL and have a built-in anti-aliasing filter
and an eight-stage BPF (switched-capacitor filter). Linear CMOS circuitry is used for low power consumption.
F
Applications
RDS / RBDS compatible FM receivers for American and European markets, car stereos, high-fidelity stereo systems
and components, and FM pagers.
F
Features
1) Low current.
2) Two-stage anti-aliasing filter (LPF).
3) 57kHz band-pass filter.
4) DSB demodulation (digital PLL).
5) Quality indication output for demodulated data.
F
Absolute maximum ratings (Ta = 25
_
C)
F
Recommended operating conditions (Ta = 25
_
C)
832
Audio ICs
BU1923 / BU1923F
F
Output data timing
The clock (RCLK) frequency is 1187.5Hz. Depending on
the state of the internal PLL clock, the data (RDATA) is
replaced in synchronous with either the rising or falling
edge of the clock. To read the data, you may choose ei-
ther the rising or falling edge of the clock as the refer-
ence. The data is valid for 416.7
s. after the reference
clock edge.
QUAL pin operation: Indicates the quality of the demodu-
lated data.
(1)
Good data: HI
(2)
Poor data: LO
F
Electrical characteristic curve
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