Product Description
Stanford Microdevices' SNA-200 is a GaAs monolithic
broadband amplifier (MMIC) in die form. This amplifier
provides 16dB of gain when biased at 50mA and 4V.
External DC decoupling capacitors determine low frequency
response. The use of an external resistor allows for bias
flexibility and stability.
These unconditionally stable amplifiers are designed for use
as general purpose 50 ohm gain blocks. Also available in
packaged form (SNA-276, -286 & -287), its small size
(0.33mm x 0.33mm) and gold metallization make it an ideal
choice for use in hybrid circuits.
The SNA-200 is available in gel paks at 100 devices per
container.
SNA-200
DC-6.5 GHz, Cascadable
GaAs MMIC Amplifier
Product Features
Cascadable 50 Ohm Gain Block
16dB Gain, +14dBm P1dB
1.5:1 Input and Output VSWR
Operates From Single Supply
Chip Back Is Ground
Applications
Narrow and Broadband Linear Amplifiers
Commercial and Industrial Applications
The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions.
Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. Stanford Microdevices does not authorize or warrant any Stanford
Microdevices product for use in life-support devices and/or systems.
Copyright 1999 Stanford Microdevices, Inc. All worldwide rights reserved.
522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com
Electrical Specifications at Ta = 25
C
S y m b o l
P a r a m e t e r s : T e s t C o n d i t i o n s :
I d = 5 0 m A , Z
0
= 5 0 O h m s
U n i t s
M i n .
T y p .
M a x .
G
P
S m a l l S i g n a l P o w e r G a i n
f = 0 . 1 - 2 . 0
G H z
f = 2 . 0 - 4 . 0 G H z
f = 4 . 0 - 6 . 5 G H z
d B
d B
d B
1 5 . 0
1 4 . 0
1 3 . 0
1 6 . 0
1 5 . 0
1 4 . 0
G
F
G a i n F la t n e s s
f = 0 . 1 - 4 . 0 G H z
d B
+ / 1 . 0
B W 3 d B
3 d B B a n d w id t h
G H z
6 . 5
P
1 d B
O u t p u t P o w e r a t 1 d B C o m p r e s s io n
f = 2 . 0 G H z
d B m
1 4 . 0
N F
N o i s e F i g u r e
f = 2 . 0 G H z
d B
5 . 5
6 . 0
V S W R
I n p u t / O u t p u t
f = 0 . 1 - 6 . 5 G H z
-
1 . 5 : 1
I P
3
T h i r d O r d e r I n t e r c e p t P o i n t
f = 2 . 0 G H z
d B m
2 7 . 0
T
D
G r o u p D e l a y
f = 2 . 0 G H z
p s e c
1 0 0
I S O L
R e v e r s e I s o l a t i o n
f = 0 . 1 - 6 . 5 G H z
d B
2 0
V
D
D e v i c e V o l t a g e
V
3 . 5
4 . 0
4 . 5
d G / d T
D e v i c e G
a i n
T e m p e r a t u r e C o e f f i c i e n t
d B
/ d e g C
- 0 . 0 0 1 8
d V / d T
D e v i c e V o l t a g e T e m p e r a t u r e
C o e f f i c i e n t
m V / d e g C
- 4 . 0
50 Ohm Gain Blocks
Output Power vs. Frequency
12
13
14
15
16
0.5
1
1.5
2
4
6
8
10
dBm
GHz
5-21
Noise Figure vs. Frequency
5
5.5
6
6.5
7
7.5
8
0.1
0.5
1
1.5
2
4
6
8
10
dB
GHz
|S11| vs. Frequency
|S21| vs. Frequency
|S12| vs. Frequency
|S22| vs. Frequency
TOIP vs. Frequency
SNA-200 DC-6.5 GHz Cascadable MMIC Amplifier
522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com
-20
-15
-10
-5
0
0.5
1
1.5
2
4
6
8
10
-25
-20
-15
-10
-5
0
0.5
1
1.5
2
4
6
8
10
10
11
12
13
14
0.5
1
1.5
2
4
6
8
10
-20
-15
-10
-5
0
0.5
1
1.5
2
4
6
8
10
24
25
26
27
28
0.5
1
1.5
2
4
6
8
10
dB
GHz
GHz
dB
dBm
dB
GHz
GHz
GHz
dB
Suggested Bonding Arrangement
Simplified Schematic of MMIC
Typical Performance at 25
C (Vds =4.0V, Ids = 50mA)
5-22
50 Ohm Gain Blocks
SNA-200 DC-6.5 GHz Cascadable MMIC Amplifier
Absolute Maximum Ratings
Part Number
Devices Per Pak
SNA-200
100
Part Number Ordering Information
Notes:
1. Operation of this device above any one of these
parameters may cause permanent damage.
MTTF vs. Temperature @ Id = 50mA
Thermal Resistance (Lead-Junction): 500 C/W
522 Almanor Ave., Sunnyvale, CA 94086 Phone: (800) SMI-MMIC http://www.stanfordmicro.com
Typical Biasing Configuration
P a r a m e te r
A b s o lu te
M a x im u m
D e vic e C ur re nt
7 0 m A
P o w e r D issipa tion
3 2 0m W
R F In p ut P o w er
1 0 0m W
Ju n ction Te m p e ra ture
+2 0 0 C
O p e ra tin g Te m p e ra tu re
-4 5 C to +8 5 C
S to ra g e Te m pe ra tu re
-6 5 C to +1 5 0 C
Die Bottom
Temperature
Junction
Temperature
MTTF (hrs)
+55C
+155C
1000000
+90C
+190C
100000
+120C
+220C
10000
50 Ohm Gain Blocks
Die Attach
The die attach process mechanically attaches the die to
the circuit substrate. In addition, it electrically connects
the ground to the trace on which the die is mounted and
establishes the thermal path by which heat can leave the
die.
Assembly Techniques
Epoxy die attach is recommended. The top and bottom
metallization is gold. Conductive silver-filled epoxies are
recommended. This method involves the use of epoxy to
form a joint between the backside gold of the chip and
the metallized area of the substrate. A 150 C cure for 1
hour is necessary. Recommended epoxy is Ablebond
84-1LMIT1 from Ablestik.
Wire Bonding
Electrical connections to the die are through wire
bonds. Stanford Microdevices recommends wedge
bonding or ball bonding to the pads of these devices.
Recommended Wedge Bonding Procedure
1. Set the heater block temperature to 260C +/- 10C.
2. Use pre-stressed (annealed) gold wire between
0.0005 to 0.001 inches in diameter.
3. Tip bonding pressure should be between 15 and
20 grams and should not exceed 20 grams. The
footprint that the wedge leaves on the gold wire
should be between 1.5 and 2.5 wire diameters
across for a good bond.
5-23
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