AMCC
Advanced Information - The information contained in this
document is about a product in its design phase and is subject
to change without notice at any time. All features described
herein are design goals. Contact AMCC for updates to this
document and the latest product status.
Features
General Description
GANGES
STS-192 POS/ATM SONET/SDH MAPPER
S19202 Block Diagram
ADVANCED SUMMARY DATASHEET
Part Number - S19202
Revision 1.6 - June 2000
Supports full duplex mapping of ATM cells or packets
for a single STS-192c/AU-4-64c, four STS-48c/AU-4-
16c or sixteen STS-12c/AU-4-4c SONET/SDH pay-
loads.
Supports quad STS-48/STM-16 line interfaces. Each
STS-48/STM-16 can support a concatenated payload,
or can be channelized down to STS-12c/AU-4-4c.
Terminates and generates SONET/SDH section, line,
& path layers, with transport/section E1, E2, F1 and
DCC overhead interfaces in both transmit and receive
directions.
Provides a 622.08 MHz 16-bit bus interface on the line
side in both the TX and RX directions.
Provides a 64-bit, 200 MHz system interface that sup-
ports the transfer of either packets or ATM cells.
Selectable scrambling/descrambling (1+X
6
+X
7
) of
SONET/SDH frame.
16-bit synchronous microprocessor interface for con-
figuration, control, and status monitoring.
Supports independent loop timing when in quad STS-
48/STM-16 mode.
Supports Automatic Protection Switching (APS)
Packaged in a 624-pin CBGA.
Implemented in .18 micron, 1.8V and 2.5V technology.
The GANGES IC is a highly-integrated VLSI device that
provides full-duplex mapping of packets or ATM cells into
SONET/SDH payloads.
GANGES provides full section and line overhead pro-
cessing for either a single STS-192/STM-64, or four STS-
48/STM-16s. It supports framing, scrambling and
descrambling, alarm signal insertion and detection, and
bit interleaved parity (B1/B2) processing. It also provides
path overhead processing for STS-192c/AU-4-64c, STS-
48c/AU-4-16c or STS-12c/AU-4-4c SONET/SDH pay-
loads and includes bit interleaved parity (B3) processing.
The GANGES IC includes an automatic protection
switching (APS) port, that permits protection switching
between two GANGES devices.
The S19202 is SONET/SDH standards compliant with
Bellcore GR-253, ITU G.707, and ANSI T1.105 -1995.
A general purpose 16-bit microprocessor interface is pro-
vided for control, and monitoring.
Applications
ATM switches and Packet over SONET Routers
SONET/SDH Add Drop Multiplexers, Terminal
Multiplexers and Digital Cross Connects
WDM and DWDM
TOH EXTRACT
L
I
NE SIDE INT
E
RF
ACE
RX_DATA_IN[15:0]
RX_CLK_IN_[1:4]
SRX_DATA_OUT[63:0]
FR
A
M
LBK
SEL
TOH
MON.
STX_DATA_IN[63:0]
TX_DATA_OUT[15:0]
SPE/VC
GENERATOR
POH
MONITOR
POINTER
INTERPRETER
FRTX
LOC
DET
TX_CLK_OUT[1:4]
T
X
_
T
OH
_C
LK
_OU
T
[1:4]
TX
_T
OH
_FR
M
_OU
T
[
1
:4]
T
X
_
T
OH_DA
T
A
_
IN[1:4]
ATM/
HDLC
Proc
ATM/
HDLC
Proc
Control
Control
MUX
D
[
15:0
]
ADDR[1
2
:
0
]
CS
N
WRB
(
RWB)
RDYB
(
DT
A
C
KB)
BUS
M
O
D
E
INT
B
MICROPROCESSOR I/F
RST
B
APS
_
I
NT
B
P
R
OT
_DA
T
A
_
O
U
T
[
1:4
][3:0]
S
E
L
P
R
OT
_
D
A
T
A
_
IN[1:4
][3:0]
FRM
MUX
R
X
_T
OH
_C
LK
_OU
T
I1:4]
RX_
T
OH_
F
RM
_
O
UT
1
:
4
]
R
X
_T
OH
_D
A
T
A
_
OU
T
[
1:4]
TOH INSERT
FRMR
FRGEN
RX
_LOS
E
X
T
_
[1:4
]
SYSTEM
ATM/POS
FIFO
POH
GENERATION
P
R
OT
_C
LK
_IN
[1
:4]
P
R
OT
_CLK
_OUT
[1:4]
x16
x16
x16
x16
x16
x16
x4
x4
x16
x16
INTRFC/
SYSTEM
ATM/POS
FIFO
INTRFC/
SYS
_
R
EF
CL
K
_
I
N
S
YS_
AS
YNC_
F
R
M
_
I
N
S
Y
S
_
R
EF
C
L
K_
O
U
T
RX
_RE
F
CLK
_
IN[1:4]
R
X
_
A
LM
_OU
T
_[1:4]
UP
CL
K
GP
IO[15:0
]
TC
K
TD
O
TM
S
TD
I
TR
S
T
B
TS
_
E
N
JTAG
AMCC
200 Brickstone Square, Andover, MA 01810 Ph: (978) 623-0009 Fax:(978) 623-0024
S19202 STS-192 POS/ATM SONET/SDH MAPPER
Revision 1.6 - June 2000
ADVANCED PRODUCT SPECIFICATION
Overview and Applications
SONET Processing
The S19202 supports either a single STS-192/STM-64,
or four STS-48/STM-16 SONET/SDH Line interfaces. It
provides full duplex mapping of ATM cells or packets for
STS-192c/AU-4-64c, STS-48c/AU-4-16c, and/or STS-
12c/AU-4-4c SONET/SDH payloads.
A TOH/SOH interface provides direct add/drop capability
for E1, E2, F1, and both Section and Line DCC channels.
The S19202 also includes a clear channel mode that
enables the direct transmission of system payload from
the system interface to the line-side interface.
Side door APS interfaces are supported in both the TX
and RX directions.
On the transmit side the S19202 generates section, line,
and path overhead. It performs framing pattern insertion
(A1, A2), scrambling, alarm signal insertion, and gener-
ates section, line and path Bit Interleaved Parity (B1/B2/
B3) for far-end performance monitoring.
On the receive side the S19202 processes section, line,
and path overhead. It performs framing (A1, A2),
descrambling, alarm detection, pointer interpretation, bit
interleaved parity monitoring (B1/B2/B3), and error count
accumulation for performance monitoring.
ATM Processing
When configured for ATM cell processing, the S19202's
ATM processor(s) will perform all necessary cell process-
ing as defined by ATM UNI3.1 and ITU-T I.432.1 and
I.432.2.
HDLC Processing
When configured for POS mode, the S19202's HDLC
processor(s) provide the insertion of HDLC framed pack-
ets into the STS SPE(s)/STM VC(s). The S19202 per-
forms HDLC processing as defined by IETF RFCs 1661,
1662 and 2615.
Line-side Interface
On the line-side, the S19202 supports a 16-bit parallel
interface, operating at 622MHz, for a single OC-192 opti-
cal interface. For quad STS-48/STM-16 operation, the
S19202 supports four 4-bit, 622 MHz, line interfaces.
(See figure below.)
System Interface
The GANGES IC provides a 64-bit, 200 MHz, system
interface for the transport of either packets or ATM cells.
TX_DATA[15:0]
TX_SONETCLK
RX_SONETCLK_[1]
RX_DATA[15:0]
P/S
SONET XMIT
with
Clk Recovery
SerRxD
SerTxD
Microprocessor
Control
Control
Reference
Clock
Fiber Optic
Transceiver
SONET
Line Side
Interface
RX_LOS_[1]
S19202
GANGES
Addr
Data
12
TOH Insertion
and Extraction
TYPICAL APPLICATIONS: GANGES in a STS-192/AU-4-64 channelized System
OC-192
Line Interface
16
STX_DATA_IN[63:0]
AMCC S3091/S3092
&
S/P
SONET RCVR
SRX_DATA_OUT[63:0]
SAR/LINK LAYER
DEVICE
System Control SIgnals
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