2000 Elantec Semiconductor, Inc.
EL
5421C
General Description
The EL5421C is a quad, low power, high voltage rail-to-rail input-out-
put buffer. Operating on supplies ranging from 5V to 15V, while
consuming only 500A per channel, the EL5421C has a bandwidth of
12MHz (-3dB). The EL5421C also provides rail-to-rail input and out-
put ability, giving the maximum dynamic range at any supply voltage.
The EL5421C also features fast slewing and settling times, as well as
a high output drive capability of 30mA (sink and source). These fea-
tures make the EL5421C ideal for use as voltage reference buffers in
Thin Film Transistor Liquid Crystal Displays (TFT-LCD). Other
applications include battery power, portable devices and anywhere
low power consumption is important.
The EL5421C is available in a space saving 10-Pin MSOP package
and operates over a temperature range of -40C to +85C.
Connection Diagram
1
2
3
4
6
5
10
9
8
7
EL 5421C (MSOP 10)
VS+
VS-
VINB
VOUTB
VOUTA
VINA
VIND
VOUTD
VINC
VOUTC
Features
12MHz -3dB Bandwidth
Unity gain buffer
Supply voltage = 4.5V to 16.5V
Low supply current (per buffer) =
500A
High slew rate = 10V/s
Rail to Rail operation
"Mini" SO Package (MSOP)
Applications
TFT-LCD Drive Circuits
Electronics Notebooks
Electronics Games
Personal Communication Devices
Personal Digital Assistants (PDA)
Portable Instrumentation
Wireless LANs
Office Automation
Active Filters
ADC/DAC Buffer
Ordering Information
Part No.
Temp. Range
Package
Outline #
EL5421CY
-40C to +85C
10-Pin MSOP
MDP0043
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
O
c
tober 2, 2000
2
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
E
L
5421C
Absolute Maximum Ratings
(T
A
= 25C)
Values beyond absolute maximum ratings can cause the device to be pre-
maturely damaged. Absolute maximum ratings are stress ratings only and
functional device operation is not implied
Supply Voltage between V
S
+ and V
S
-
+18V
Input Voltage
V
S
- - 0.5V, V
S
+ +0.5V
Maximum Continuous Output Current
30mA
Maximum Die Temperature
+125C
Storage Temperature
-65C to +150C
Operating Temperature
-40C to +85C
Power Dissipation
See Curves
ESD Voltage
2kV
Important Note:
All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the
specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
Electrical Characteristics
V
S+
= +5V, V
S
- = -5V, R
L
= 10k
and C
L
= 10pF to 0V, TA = 25C unless otherwise specified.
Parameter
Description
Condition
Min
Typ
Max
Unit
Input Characteristics
V
OS
Input Offset Voltage
V
CM
= 0V
2
12
mV
TCV
OS
Average Offset Voltage Drift
[1]
5
V/C
I
B
Input Bias Current
V
CM
= 0V
2
50
nA
R
IN
Input Impedance
1
G
C
IN
Input Capacitance
1.35
pF
A
V
Voltage Gain
-4.5V
V
OUT
4.5V
0.995
1.005
V/V
Output Characteristics
V
OL
Output Swing Low
I
L
= -5mA
-4.92
-4.85
V
V
OH
Output Swing High
I
L
= 5mA
4.85
4.92
V
I
SC
Short Circuit Current
Short to GND
[2]
80
120
mA
Power Supply Performance
PSRR
Power Supply Rejection Ratio
V
S
is moved from 2.25V to 7.75V
60
80
dB
I
S
Supply Current (Per Buffer)
No Load
500
750
A
Dynamic Performance
SR
Slew Rate
[3]
-4.0V
V
OUT
4.0V, 20% to 80%
7
10
V/s
t
S
Settling to +0.1%
V
O
= 2V Step
500
ns
BW
-3dB Bandwidth
R
L
= 10k
, C
L
= 10pF
12
MHz
CS
Channel Separation
f = 5MHz
75
dB
1.
Measured over the operating temperature range
2.
Parameter is guaranteed (but not test) by design and characterization data
3.
Slew rate is measured on rising and falling edges
3
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL
5421C
Electrical Characteristics
V
S
+ = +5V, V
S
- = 0V, R
L
= 10k
and C
L
= 10pF to 2.5V, TA = 25C unless otherwise specified.
Parameter
Description
Condition
Min
Typ
Max
Unit
Input Characteristics
V
OS
Input Offset Voltage
V
CM
= 2.5V
2
10
mV
TCV
OS
Average Offset Voltage Drift
[1]
5
V/C
I
B
Input Bias Current
V
CM
= 2.5V
2
50
nA
R
IN
Input Impedance
1
G
C
IN
Input Capacitance
1.35
pF
A
V
Voltage Gain
0.5
V
OUT
4.5V
0.995
1.005
V/V
Output Characteristics
V
OL
Output Swing Low
I
L
= -5mA
80
150
mV
V
OH
Output Swing High
I
L
= 5mA
4.85
4.92
V
I
SC
Short Circuit Current
Short to GND
[2]
80
120
mA
Power Supply Performance
PSRR
Power Supply Rejection Ratio
V
S
is moved from 4.5V to 15.5V
60
80
dB
I
S
Supply Current (Per Buffer)
No Load
500
750
A
Dynamic Performance
SR
Slew Rate
[3]
1V
V
OUT
4V, 20% to 80%
7
10
V/s
t
S
Settling to +0.1%
V
O
= 2V Step
500
ns
BW
-3dB Bandwidth
R
L
= 10 k
, C
L
= 10pF
12
MHz
CS
Channel Separation
f = 5MHz
75
dB
1.
Measured over the operating temperature range
2.
Parameter is guaranteed (but not test) by design and characterization data
3.
Slew rate is measured on rising and falling edges
4
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
E
L
5421C
Electrical Characteristics
V
S
+ = +15V, V
S
- = 0V, R
L
= 10k
and C
L
= 10pF to 7.5V, TA = 25C unless otherwise specified.
Parameter
Description
Condition
Min
Typ
Max
Unit
Input Characteristics
V
OS
Input Offset Voltage
V
CM
= 7.5V
2
14
mV
TCV
OS
Average Offset Voltage Drift
[1]
5
V/C
I
B
Input Bias Current
V
CM
= 7.5V
2
50
nA
R
IN
Input Impedance
1
G
C
IN
Input Capacitance
1.35
pF
A
V
Voltage Gain
0.5
V
OUT
14.5V
0.995
1.005
V/V
Output Characteristics
V
OL
Output Swing Low
I
L
= -5mA
80
150
mV
V
OH
Output Swing High
I
L
= 5mA
14.85
14.92
V
I
SC
Short Circuit Current
Short to GND
[2]
80
120
mA
Power Supply Performance
PSRR
Power Supply Rejection Ratio
V
S
is moved from 4.5V to 15.5V
60
80
dB
I
S
Supply Current (Per Buffer)
No Load
500
750
A
Dynamic Performance
SR
Slew Rate
[3]
1V
V
OUT
14V, 20% to 80%
7
10
V/s
t
S
Settling to +0.1%
V
O
= 2V Step
500
ns
BW
-3dB Bandwidth
R
L
= 10 k
, C
L
= 10pF
12
MHz
CS
Channel Separation
f = 5MHz
75
dB
1.
Measured over the operating temperature range
2.
Parameter is guaranteed (but not test) by design and characterization data
3.
Slew rate is measured on rising and falling edges
5
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL
5421C
Typical Performance Curves
Input Offset Voltage Distribution
400
1200
Q
uant
i
t
y
(
B
u
f
f
e
rs
)
Input Offset Voltage (mV)
0
-1
2
1800
1600
800
200
1400
1000
600
-1
0
-8
-6
-4
-2
-0
2
4
6
8
10
12
V
S
=5V
T
A
=25C
Typical
Production
Distribution
Input Offset Voltage Drift, TCV
OS
( V/C)
1
3
5
7
9
11
13
15
17
19
21
10
50
Q
u
a
n
ti
ty (
B
u
ffe
r
s
)
0
70
30
60
40
20
Input Offset Voltage Drift
V
S
=5V
Input Bias Current vs Temperature
0.0
I
nput
B
i
as
Cur
r
ent
(nA
)
Temperature (C)
-2.0
2.0
Output Low Voltage vs Temperature
-4.95
-4.93
Out
put
L
o
w
V
o
l
t
ag
e (
V
)
-4.97
-4.91
0
150
50
-50
100
0
150
Temperature (C)
50
-50
100
-4.92
-4.94
-4.96
V
S
=5V
I
OUT
=-5mA
V
S
=5V
Output High Voltage vs Temperature
4.94
4.95
Out
put
Hi
gh V
o
l
t
a
ge (V
)
4.93
4.97
0
150
Temperature (C)
50
-50
100
4.96
V
S
=5V
I
OUT
=5mA
Input Offset Voltage vs Temperature
0
150
0
5
I
nput
Of
f
s
et
V
o
l
t
age
(
m
V
)
Temperature (C)
-5
50
-50
100
10
V
S
=5V
Typical
Production
Distribution
6
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
E
L
5421C
Supply Current per Channel vs Supply Voltage
5
20
400
600
S
u
ppl
y
C
u
rre
nt
(
A
)
Supply Voltage (V)
300
10
0
700
500
15
T
A
=25C
Slew Rate vs Temperature
0
150
10.30
10.35
S
l
e
w
R
a
te
(
V
/
S
)
Temperature (C)
10.25
50
-50
100
10.40
Supply Current per Channel vs Temperature
0.5
0.55
S
upp
l
y
Cur
r
ent
(m
A
)
0.45
0
150
Temperature (C)
50
-50
100
V
S
=5V
Frequency Response for Various R
L
1M
100M
-5
0
M
agn
i
t
ud
e (
N
or
m
a
l
i
z
ed)
(
d
B
)
Frequency (Hz)
-15
10M
100k
5
-10
C
L
=10pF
V
S
=5V
10k
1k
560
150
1M
100M
Frequency (Hz)
10M
100k
0
10
M
a
gni
t
u
de (No
r
m
a
l
i
z
e
d
) (dB
)
-30
20
-20
-10
Frequency Response for Various C
L
12pF
50pF
R
L
=10k
V
S
=5V
100pF
1000pF
Voltage Gain vs Temperature
V
o
l
t
age Gai
n
(V
/
V
)
0.9995
0
150
Temperature (C)
50
-50
100
1.0005
1.0000
V
S
=5V
V
S
=5V
7
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL
5421C
Maximum Output Swing vs Frequency
Ma
x
i
mu
m Ou
t
p
u
t
Sw
in
g
(
V
P-P
)
Frequency (Hz)
10k
100k
0
2
4
12
1M
6
10M
V
S
=5V
T
A
=25C
R
L
=10k
C
L
=12pF
Distortion <1%
8
10
PSRR vs Frequency
100
0
PS
R
R
(
d
B
)
Frequency (Hz)
80
60
40
20
1M
10M
10k
100k
V
S
=
5V
1k
PSRR+
PSRR-
Input Voltage Noise Spectral Density vs
Frequency
100
100k
100M
10
100
V
o
l
t
age Noi
s
e
(
nV
Hz
)
Frequency (Hz)
1
10M
1k
10k
1M
600
1k
10k
100k
0.005
0.008
Total Harmonic Distortion + Noise vs Frequency
Frequency (Hz)
T
H
D+
N (%
)
Channel Separation vs Frequency Response
1k
-60
X-
T
a
lk
(
d
B)
Frequency (Hz)
-140
-120
-100
-80
0.010
0.001
0.003
Dual measured Channel A to B
Quad measured Channel A to D or B to C
Other combinations yield improved rejection.
1M
6M
10k
100k
V
S
=5V
R
L
=10k
V
IN
=220mV
RMS
V
S
=5V
R
L
=10k
V
IN
=1V
RMS
0.006
0.009
0.007
0.004
0.002
Output Impedance vs Frequency
Out
put
I
m
peda
nc
e
(
)
Frequency (Hz)
10k
100k
0
40
80
120
200
1M
160
10M
V
S
=5V
T
A
=25C
8
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
E
L
5421C
V
S
=5V
T
A
=25C
R
L
=10k
C
L
=12pF
Small Signal Transient Response
Settling Time vs Step Size
800
-2
2
St
e
p
Siz
e
(
V
)
Settling Time (nS)
600
0
4
200
400
3
1
-3
0
-1
-4
0.1%
0.1%
V
S
=5V
R
L
=10k
C
L
=12pF
T
A
=25C
1V
1 S
V
S
=5V
T
A
=25C
R
L
=10k
C
L
=12pF
Large Signal Transient Response
10
100
1000
Small-Signal Overshoot vs Load Capacitance
Load Capacitance (pF)
Ov
ers
hoot
(%
)
V
S
=5V
R
L
=10k
V
IN
=50mV
T
A
=25C
50
90
70
30
10
50mV
200nS
9
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL
5421C
Pin Description
EL5421C
Name
Function
Equivalent Circuit
1
V
OUTA
Buffer A Output
2
V
INA
Buffer A Input
3
V
S+
Positive Power Supply
4
V
INB
Buffer B Input
(Reference Circuit 1)
5
V
OUTB
Buffer B Output
(Reference Circuit 2)
6
V
OUTC
Buffer C Output
(Reference Circuit 2)
7
V
INC
Buffer C Input
(Reference Circuit 1)
8
V
S-
Negative Power Supply
9
V
IND
Buffer D Input
(Reference Circuit 2)
10
V
OUTD
Buffer D Output
(Reference Circuit 1)
V
S+
GND
V
S-
Circuit 1
V
S+
V
S-
Circuit 2
10
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
E
L
5421C
Applications Information
Product Description
The EL5421C unity gain buffer is fabricated using a
high voltage CMOS process. It exhibits Rail-to-Rail
input and output capability, and has low power con-
sumption (500A per buffer). These features make the
EL5421C ideal for a wide range of general-purpose
applications. When driving a load of 10k
and 12pF, the
EL5421C has a -3dB bandwidth of 12 MHz and exhibits
10V/S slew rate.
Operating Voltage, Input, and Output
The EL5421C is specified with a single nominal supply
voltage from 5V to 15V or a split supply with its total
range from 5V to 15V. Correct operation is guaranteed
for a supply range of 4.5V to 16.5V. Most EL5421C
specifications are stable over both the full supply range
and operating temperatures of -40 C to +85 C. Param-
e t e r v a r i a t i o n s w i t h o p e r a t i n g v o l t a g e a n d / o r
temperature are shown in the typical performance
curves.
The output swings of the EL5421C typically extend to
within 80mV of positive and negative supply rails with
load currents of 5mA. Decreasing load currents will
extend the output voltage range even closer to the supply
rails. Figure 1 shows the input and output waveforms for
the device. Operation is from +/-5V supply with a 10k
load
connected to GND. The input is a 10Vp-p sinusoid.
The output voltage is approximately 9.985 V
P-P
.
Figure 1. Operation with Rail-to-Rail Input and
Output
Short Circuit Current Limit
The EL5421C will limit the short circuit current to +/-
120mA if the output is directly shorted to the positive or
the negative supply. If an output is shorted indefinitely,
the power dissipation could easily increase such that the
device may be damaged. Maximum reliability is main-
tained if the output continuous current never exceeds +/-
30 mA. This limit is set by the design of the internal
metal interconnects.
Output Phase Reversal
The EL5421C is immune to phase reversal as long as the
input voltage is limited from V
S
- - 0.5V to V
S
+ +0.5V.
Figure 2 shows a photo of the output of the device with
the input voltage driven beyond the supply rails.
Although the device's output will not change phase, the
input's overvoltage should be avoided. If an input volt-
age exceeds supply voltage by more than 0.6V,
electrostatic protection diodes placed in the input stage
of the device begin to conduct and overvoltage damage
could occur.
Figure 2. Operation with Beyond-the-Rails
Input
Power Dissipation
With the high-output drive capability of the EL5421C
buffer, it is possible to exceed the 125C 'absolute-max-
imum junction temperature' under certain load current
conditions. Therefore, it is important to calculate the
5V
5V
10 S
V
S
=5V
T
A
=25C
V
IN
=10V
P-P
O
u
t
p
ut
I
npu
t
1V
1V
10 S
V
S
=2.5V
T
A
=25C
V
IN
=6V
P-P
11
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
EL
5421C
maximum junction temperature for the application to
determine if load conditions need to be modified for the
buffer to remain in the safe operating area.
The maximum power dissipation allowed in a package is
determined according to:
where:
T
JMAX
= Maximum Junction Temperature
T
AMAX
= Maximum Ambient Temperature
JA
= Thermal Resistance of the Package
P
DMAX
= Maximum Power Dissipation in the
Package
The maximum power dissipation actually produced by
an IC is the total quiescent supply current times the total
power supply voltage, plus the power in the IC due to the
loads, or:
when sourcing, and:
when sinking.
Where:
i = 1 to 4 for Quad
V
S
= Total Supply Voltage
I
SMAX
= Maximum Supply Current Per Channel
V
OUT
i = Maximum Output Voltage of the
Application
I
LOAD
i = Load current
If we set the two P
DMAX
equations equal to each other,
we can solve for R
LOAD
i to avoid device overheat. Fig-
ure 3 and Figure 4 provide a convenient way to see if the
device will overheat. The maximum safe power dissipa-
tion can be found graphically, based on the package type
and the ambient temperature. By using the previous
equation, it is a simple matter to see if P
DMAX
exceeds
the device's power derating curves. To ensure proper
operation, it is important to observe the recommended
derating curves shown in Figure 3 and Figure 4.
Figure 3. Package Power Dissipation vs
Ambient Temperature
Figure 4. Package Power Dissipation vs
Ambient Temperature
Unused Buffers
It is recommended that any unused buffer have the input
tied to the ground plane.
P
DM AX
T
JMAX
T
AM AX
JA
----------------------------------------------
=
P
DMAX
i V
[
S
I
SMA X
V
(
S
+
V
OUT
i
) I
L OAD
i
+
]
=
P
DMA X
i V
[
S
I
SM AX
V
(
OU T
i
V
S
-
) I
L OAD
i
+
]
=
MSOP10 Package Mounted on JEDEC JESD51-7
High Effective Thermal Conductivity Test Board
50
150
400
800
P
o
w
e
r Di
s
s
i
pat
i
on (m
W)
Ambient Temperature (C)
0
100
0
125
1200
MAX T
J
=125C
25
75
1000
600
200
MS
OP1
0
----
JA
=11
5C
/W
870mW
85
MSOP10 Package Mounted on JEDEC JESD51-3
Low Effective Thermal Conductivity Test Board
P
o
wer
D
i
s
s
i
pat
i
o
n (
m
W)
Ambient Temperature (C)
50
150
100
0
125
25
75 85
600
500
400
300
200
100
0
485mW
MAX T
J
=125C
MS
OP
10
---
JA
=2
06
C/W
12
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
E
L
5421C
Driving Capacitive Loads
The EL5421C can drive a wide range of capacitive
loads. As load capacitance increases, however, the -3dB
bandwidth of the device will decrease and the peaking
increase. The buffers drive 10pF loads in parallel with
10 k
with just 1.5dB of peaking, and 100pF with 6.4dB
of peaking. If less peaking is desired in these applica-
tions, a small series resistor (usually between 5
and 50
) can be placed in series with the output. However, this
will obviously reduce the gain slightly. Another method
of reducing peaking is to add a "snubber" circuit at the
output. A snubber is a shunt load consisting of a resistor
in series with a capacitor. Values of 150
and 10nF are
typical. The advantage of a snubber is that it does not
draw any DC load current or reduce the gain
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5421C can provide gain at high frequency. As
with any high-frequency device, good printed circuit
board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power sup-
ply pins must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where
the V
S
- pin is connected to ground, a 0.1 F ceramic
capacitor should be placed from V
S
+ to pin to V
S
- pin. A
4.7F tantalum capacitor should then be connected in
parallel, placed in the region of the buffer. One 4.7F
capacitor may be used for multiple devices. This same
capacitor combination should be placed at each supply
pin to ground if split supplies are to be used.
13
EL5421C
Quad 12MHz Rail-to-Rail Input-Output Buffer
E
L
5421C
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Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the cir-
cuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described
herein and makes no representations that they are free from patent infringement.
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Elantec, Inc. products are not authorized for and should not be used
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Elantec, Inc. Life Support systems are equipment intended to sup-
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in accordance with instructions provided can be reasonably
expected to result in significant personal injury or death. Users con-
templating application of Elantec, Inc. Products in Life Support
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to establish suitable terms & conditions for these applications. Elan-
tec, Inc.'s warranty is limited to replacement of defective
components and does not cover injury to persons or property or
other consequential damages.
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Telephone: (408) 945-1323
(888) ELANTEC
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October
2, 200
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