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1
FEATURES
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current: 25
A (Max.) @ V
DS
= 800V
Lower R
DS(ON)
: 0.746
(Typ.)
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Symbol
Characteristics
Value
Units
V
DSS
Drain-to-Source Voltage
800
V
I
D
Continuous Drain Current (T
C
= 25
C)
10
A
Continuous Drain Current (T
C
= 100
C)
6.3
I
DM
Drain Current-Pulsed
40
A
V
GS
Gate-to-Source Voltage
30
V
E
AS
Single Pulsed Avalanche Energy
533
mJ
I
AR
Avalanche Current
10
A
E
AR
Repetitive Avalanche Energy
28
mJ
dv/dt
Peak Diode Recovery dv/dt
2.0
V/ns
P
D
Total Power Dissipation (T
C
= 25
C)
Linear Derating Factor
280
2.22
W
W/
C
T
J
, T
STG
Operating Junction and Storage
Temperature Range
-
55 to +150
C
T
L
Maximum Lead Temp. for Soldering
Purposes, 1/8" from case for 5-seconds
300
Symbol
Characteristics
Typ.
Max.
Units
R
JC
Junction-to-Case
-
0.45
C/W
R
CS
Case-to-Sink
0.24
-
R
JA
Junction-to-Ambient
-
40
BV
DSS
= 800V
R
DS(ON)
= 0.95
I
D
= 10A
TO-3P
1. Gate 2. Drain 3. Source
3
2
1
N-CHANNEL POWER MOSFET
SSH10N80A
1999 Fairchild Semiconductor Corporation
REV. B
x
y
x
x
z
SSH10N80A
N-CHANNEL POWER MOSFET
2
ELECTRICAL CHARACTERISTICS
(T
C
= 25
C unless otherwise specified)
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Notes:
x
Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
y
L=10mH, I
AS
=10A, V
DD
=50V, R
G
=27
, Starting T
J
=25
C
z
I
SD
10A, di/dt
200A/
s, V
DD
BV
DSS
, Starting T
J
=25
C
{
Pulse Test: Pulse Width
250
s, Duty Cycle
2%
|
Essentially Independent of Operating Temperature
Symbol
Characteristics
Min.
Typ.
Max.
Units
Test Conditions
BV
DSS
Drain-Source Breakdown Voltage
800
-
-
V
V
GS
=0V, I
D
=250
A
BV/
T
J
Breakdown Voltage Temp. Coeff.
-
1.02
-
V/
C
I
D
=250
A, See Fig 7
V
GS(th)
Gate Threshold Voltage
2.0
-
3.5
V
V
DS
=5V, I
D
=250
A
I
GSS
Gate-Source Leakage, Forward
-
-
100
nA
V
GS
=30V
Gate-Source Leakage, Reverse
-
-
-
100
V
GS
=
-
30V
I
DSS
Drain-to-Source Leakage Current
-
-
25
A
V
DS
=800V
-
-
250
V
DS
=640V, T
C
=125
C
R
DS(on)
Static Drain-Source
On-State Resistance
-
-
0.95
V
GS
=10V, I
D
=5A
{
g
fs
Forward Transconductance
-
8.43
-
S
V
DS
=50V, I
D
=5A
{
C
iss
Input Capacitance
-
2700
3500
pF
V
GS
=0V, V
DS
=25V
f=1MHz
See Fig 5
C
oss
Output Capacitance
-
260
300
C
rss
Reverse Transfer Capacitance
-
110
130
t
d(on)
Turn-On Delay Time
-
29
70
ns
V
DD
=400V, I
D
=10A
R
G
=9.6
See Fig 13
{ |
t
r
Rise Time
-
58
315
t
d(off)
Turn-Off Delay Time
-
152
235
t
f
Fall Time
-
48
105
Q
g
Total Gate Charge
-
125
165
nC
V
DS
=640V, V
GS
=10V
I
D
=10A
See Fig 6 & Fig 12
{ |
Q
gs
Gate-Source Charge
-
19.2
-
Q
gd
Gate-Drain (Miller) Charge
-
45.4
-
Symbol
Characteristics
Min.
Typ.
Max.
Units
Test Conditions
I
S
Continuous Source Current
-
-
10
A
Integral reverse pn-diode
in the MOSFET
I
SM
Pulsed-Source Current
x
-
-
40
V
SD
Diode Forward Voltage
{
-
-
1.4
V
T
J
=25
C, I
S
=10A, V
GS
=0V
t
rr
Reverse Recovery Time
-
620
-
ns
T
J
=25
C, I
F
=10A
di
F
/dt=100A/
s
{
Q
rr
Reverse Recovery Charge
-
10.17
-
C
3
10
-1
10
0
10
1
10
-1
10
0
10
1
@ Notes :
1. 250
s Pulse Test
2. T
C
= 25
o
C
V
GS
Top : 1 5 V
1 0 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
I
D
,
Drai
n Cur
rent
[A]
V
DS
, Drain-Source Voltage [V]
2
4
6
8
10
10
-1
10
0
10
1
25
o
C
150
o
C
- 55
o
C
@ Notes :
1. V
GS
= 0 V
2. V
DS
= 50 V
3. 250
s Pulse Test
I
D
, D
rain Current
[A]
V
GS
, Gate-Source Voltage [V]
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10
-1
10
0
10
1
150
o
C
25
o
C
@ Notes :
1. V
GS
= 0 V
2. 250
s Pulse Test
I
DR
, R
everse Drain
Current [A
]
V
SD
, Source-Drain Voltage [V]
0
10
20
30
40
50
0.0
0.5
1.0
1.5
2.0
@ Note : T
J
= 25
o
C
V
GS
= 20 V
V
GS
= 10 V
R
DS
(o
n)
,
[
]
Dra
in-S
ource
On-R
esis
tance
I
D
, Drain Current [A]
10
0
10
1
0
1000
2000
3000
4000
C
iss
= C
gs
+ C
gd
(
C
ds
= shorted
)
C
oss
= C
ds
+ C
gd
C
rss
= C
gd
@ Notes :
1. V
GS
= 0 V
2. f = 1 MHz
C
rss
C
oss
C
iss
Cap
acit
ance
[pF]
V
DS
, Drain-Source Voltage [V]
0
20
40
60
80
100
120
140
0
5
10
V
DS
= 640 V
V
DS
= 400 V
V
DS
= 160 V
@ Notes : I
D
= 10.0 A
V
GS
, G
ate-Source V
oltage [V]
Q
G
, Total Gate Charge [nC]
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
Fig 6. Gate Charge vs. Gate-Source Voltage
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 4. Source-Drain Diode Forward Voltage
Fig 3. On-Resistance vs. Drain Current
N-CHANNEL POWER MOSFET
SSH10N80A
SSH10N80A
N-CHANNEL POWER MOSFET
4
-75
-50
-25
0
25
50
75
100
125
150
175
0.8
0.9
1.0
1.1
1.2
@ Notes :
1. V
GS
= 0 V
2. I
D
= 250
A
BV
DS
S
, (N
ormalized)
Drain
-Source Br
eakdown Vo
ltage
T
J
, Junction Temperature [
o
C]
-75
-50
-25
0
25
50
75
100
125
150
175
0.0
0.5
1.0
1.5
2.0
2.5
3.0
@ Notes :
1. V
GS
= 10 V
2. I
D
= 5.0 A
R
DS
(on
)
, (Normalized)
Drain-Source On-Resistance
T
J
, Junction Temperature [
o
C]
25
50
75
100
125
150
0
3
6
9
12
I
D
, Drain Current [A]
T
c
, Case Temperature [
o
C]
10
1
10
2
10
3
10
-1
10
0
10
1
10
2
100
s
DC
10
s
1 ms
10 ms
@ Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
Operation in This Area
is Limited by R
DS(on)
I
D
, Dr
ain Curren
t [A]
V
DS
, Drain-Source Voltage [V]
10
- 5
10
- 4
10
- 3
10
- 2
10
- 1
10
0
10
1
10
- 2
10
- 1
10
0
single pulse
0.2
0.1
0.01
0.02
0.05
D=0.5
@ Notes :
1. Z
J C
(t)=0.45
o
C/W Max.
2. Duty Factor, D=t
1
/t
2
3. T
J M
-T
C
=P
D M
*Z
J C
(t)
Z
JC
(t)
, Th
ermal
Res
ponse
t
1
, Square Wave Pulse Duration [sec]
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
Fig 11. Thermal Response
Fig 10. Max. Drain Current vs. Case Temperature
Fig 9. Max. Safe Operating Area
P
DM
t
1
t
2
P
DM
t
1
t
2
t
1
t
2
5
Fig 12. Gate Charge Test Circuit & Waveform
Fig 13. Resistive Switching Test Circuit & Waveforms
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
E
AS
=
L
L
I
AS
2
----
2
1
--------------------
BV
DSS
-- V
DD
BV
DSS
E
AS
=
L
L
I
AS
2
----
2
1
E
AS
=
L
L
I
AS
2
----
2
1
----
2
1
--------------------
BV
DSS
-- V
DD
BV
DSS
V
in
V
out
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
in
V
out
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
Vary t
p
to obtain
required peak I
D
10V
V
DD
C
L
L
V
DS
I
D
R
G
t
p
DUT
Vary t
p
to obtain
required peak I
D
10V
V
DD
C
L
L
V
DS
I
D
R
G
t
p
DUT
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
V
DD
( 0.5 rated V
DS
)
10V
V
out
V
in
R
L
DUT
R
G
V
DD
( 0.5 rated V
DS
)
10V
V
out
V
in
R
L
DUT
R
G
3mA
V
GS
Current Sampling (I
G
)
Resistor
Current Sampling (I
D
)
Resistor
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
Current Regulator
R
1
R
2
3mA
V
GS
Current Sampling (I
G
)
Resistor
Current Sampling (I
D
)
Resistor
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
Current Regulator
R
1
R
2
N-CHANNEL POWER MOSFET
SSH10N80A
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