PROFET BTS 740 S2
Semiconductor Group
1 of 1
5
2003-Oct-01
Smart High-Side Power Switch
Two Channels: 2 x 30m
Current Sense
Product Summary Package
Operating Voltage
V
bb(on)
5.0...34V
Active channels one
two parallel
On-state Resistance
R
ON
30m
15m
Nominal load current
I
L(NOM)
5.5A
8.5A
Current limitation
I
L(SCr)
24A
24A
General Description
N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input,
diagnostic feedback and proportional load current sense monolithically integrated in Smart SIPMOS
technology.
Providing embedded protective functions
Applications
C compatible high-side power switch with diagnostic feedback for 12V and 24V grounded loads
All types of resistive, inductive and capacitve loads
Most suitable for loads with high inrush currents, so as lamps
Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
CMOS compatible input
Undervoltage and overvoltage shutdown with auto-restart and hysteresis
Fast demagnetization of inductive loads
Logic ground independent from load ground
Protection Functions
Short circuit protection
Overload protection
Current
limitation
Thermal
shutdown
Overvoltage protection (including load dump) with external
resistor
Reverse battery protection with external resistor
Loss of ground and loss of V
bb
protection
Electrostatic discharge protection (ESD)
Diagnostic Functions
Proportinal load current sense
Diagnostic feedback with open drain output
Open load detection in OFF-state with external resistor
Feedback of thermal shutdown in ON-state
P-DSO-20-9
Vbb
Logic
Channel
1
Logic
Channel
2
IN1
ST1
IS1
IN2
ST2
IS2
GND
Load 1
Load 2
PROFET
OUT 1
OUT 2
PROFET BTS 740 S2
Semiconductor Group
2
2003-Oct-01
Functional diagram
Pin Definitions and Functions
Pin
Symbol Function
1,10,
11,12,
15,16,
19,20
V
bb
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
3 IN1
Input 1,2, activates channel 1,2 in case of
7
IN2
logic high signal
17,18 OUT1 Output 1,2, protected high-side power output
13,14
OUT2
of channel 1,2. Both pins of each output have
to be connected in parallel for operation
according ths spec (e.g. k
ilis
). Design the wiring
for the max. short circuit current
4 ST1
Diagnostic feedback 1,2 of channel 1,2,
8
ST2
open drain, invers to input level
2 GND1
Ground 1 of chip 1 (channel 1)
6 GND2
Ground 2 of chip 2 (channel 2)
5 IS1
9 IS2
Sense current output 1,2; proportional to the
load current, zero in the case of current
limitation of the load current
Pin configuration
(top view)
V
bb
1
20 V
bb
GND1 2
19 V
bb
IN1 3
18 OUT1
ST1 4
17 OUT1
IS1 5
16 V
bb
GND2 6
15 V
bb
IN2 7
14 OUT2
ST2 8
13 OUT2
IS2 9
12 V
bb
V
bb
10
11 V
bb
OUT1
overvoltage
protection
logic
internal
voltage supply
ESD
temperature
sensor
clamp for
inductive load
gate
control
+
charge
pump
current limit
Open load
detection
ST1
VBB
LOAD
IN1
PROFET
GND1
Control and protection circuit
of
channel 2
IN2
ST2
OUT2
Channel 1
Current
sense
GND2
IS2
IS1
R
O1
GND1
PROFET BTS 740 S2
Semiconductor Group
3
2003-Oct-01
Maximum Ratings
at T
j
= 25C unless otherwise specified
Parameter Symbol
Values
Unit
Supply voltage (overvoltage protection see page 5) V
bb
43
V
Supply voltage for full short circuit protection
T
j,start
=
-40 ...+150C
V
bb
34
V
Load current (Short-circuit current, see page 5) I
L
self-limited
A
Load dump protection
1
)
V
LoadDump
= V
A
+ V
s
, V
A
= 13.5 V
R
I
2
)
= 2
, t
d
= 200
ms; IN
= low or high,
each channel loaded with R
L
=
7.0
,
V
Load
dump
3
)
60
V
Operating temperature range
Storage temperature range
T
j
T
stg
-40 ...+150
-55 ...+150
C
Power dissipation (DC)
4)
T
a
= 25C:
(all channels active)
T
a
= 85C:
P
tot
3.8
2.0
W
Maximal switchable inductance, single pulse
V
bb
=
12V, T
j,start
=
150C
4)
,
I
L
=
5.5
A, E
AS
=
370 mJ, 0
one
channel:
I
L
=
8.5
A, E
AS
=
790 mJ, 0
two parallel channels:
see diagrams on page 10
Z
L
18
16
mH
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
ST, IS:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5k
; C=100pF
V
ESD
1.0
4.0
8.0
kV
Input voltage (DC)
V
IN
-10 ... +16
V
Current through input pin (DC)
Current through status pin (DC)
Current through current sense pin (DC)
see internal circuit diagram page 9
I
IN
I
ST
I
IS
2.0
5.0
14
mA
Thermal Characteristics
Parameter and Conditions Symbol
Values
Unit
min typ
Max
Thermal resistance
junction - soldering point
4),5)
each
channel:
R
thjs
-- --
12
K/W
junction - ambient
4)
one channel active:
all channels active:
R
thja
--
--
40
33
--
--
1
) Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended.
2)
R
I
= internal resistance of the load dump test pulse generator
3)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
4
) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 15
5
) Soldering point: upper side of solder edge of device pin 15. See page 15
PROFET BTS 740 S2
Semiconductor Group
4
2003-Oct-01
Electrical Characteristics
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150C, V
bb
= 12 V unless otherwise specified
min typ
max
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT);
IL = 5 A
each channel, T
j
= 25C:
T
j
= 150C:
two parallel channels, T
j
= 25C:
R
ON
--
27
54
14
30
60
15
m
Output voltage drop limitation at small load
currents,
see page 14
IL = 0.5 A
Tj =-40...+150C:
V
ON(NL)
--
50 --
mV
Nominal load current
one channel active:
two parallel channels active:
Device on PCB
6
), Ta
=
85C, Tj
150C
I
L(NOM)
4.9
7.8
5.5
8.5
--
A
Output current
while GND disconnected or pulled
up
7
)
;
Vbb = 30 V, VIN = 0, see diagram page 10
I
L(GNDhigh)
-- -- 8
mA
Turn-on time
8
)
IN
to 90% V
OUT
:
Turn-off time
IN
to 10% V
OUT
:
R
L
=
12
t
on
t
off
25
25
70
80
150
200
s
Slew rate on
8)
10 to 30% V
OUT
,
R
L
=
12
:
dV/dt
on
0.1 -- 1
V/
s
Slew rate off
8)
70 to 40% V
OUT
, R
L
=
12
:
-dV/dt
off
0.1 -- 1
V/
s
Operating Parameters
Operating voltage
9
)
V
bb(on)
5.0
--
34
V
Undervoltage shutdown
V
bb(under)
3.2 --
5.0
V
Undervoltage restart
T
j
=-40...+25C:
T
j
=+150C:
V
bb(u rst)
-- 4.5 5.5
6.0
V
Undervoltage restart of charge pump
see diagram page 13
T
j
=-40...+25C:
T
j
=150C:
V
bb(ucp)
--
--
4.7
--
6.5
7.0
V
Undervoltage hysteresis
Vbb(under) = Vbb(u rst) - Vbb(under)
V
bb(under)
-- 0.5 --
V
Overvoltage shutdown
V
bb(over)
34
--
43
V
Overvoltage restart
V
bb(o rst)
33 -- --
V
6
) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2
(one layer, 70
m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 15
7
) not subject to production test, specified by design
8
) See timing diagram on page 11.
9)
At supply voltage increase up to V
bb
= 4.7 V typ without charge pump, V
OUT
V
bb
- 2 V
PROFET BTS 740 S2
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150C, V
bb
= 12 V unless otherwise specified
min typ
max
Semiconductor Group
5
2003-Oct-01
Overvoltage hysteresis
V
bb(over)
-- 1 --
V
Overvoltage protection
10
)
T
j
=-40:
Ibb=40 mA
T
j
=+25...+150C:
V
bb(AZ)
41
43
--
47
--
52
V
Standby current
11
)
T
j
=-40C...25C
:
V
IN
=
0;
T
j
=150C:
I
bb(off)
--
--
8
24
30
50
A
Leakage output current (included in I
bb(off)
)
V
IN
=
0
I
L(off)
-- --
20
A
Operating current
12)
, V
IN
=
5V,
I
GND
= I
GND1
+ I
GND2
,
one channel on:
two channels on:
I
GND
--
--
1.2
2.4
3
6
mA
Protection Functions
13)
Current limit,
(see timing diagrams, page 12)
T
j
=-40C:
T
j
=25C:
T
j
=+150C:
I
L(lim)
48
40
31
56
50
37
65
58
45
A
Repetitive short circuit current limit,
T
j
= T
jt
each channel
two parallel channels
(see timing diagrams, page 12)
I
L(SCr)
--
--
24
24
--
--
A
Initial short circuit shutdown time
T
j,start
=25C:
(see timing diagrams on page 12)
t
off(SC)
--
2.0
--
ms
Output clamp (inductive load switch off)
14)
at VON(CL) = Vbb - VOUT
,
IL= 40 mA
T
j
=-40C:
T
j
=25C...150C:
V
ON(CL)
41
43
--
47
--
52
V
Thermal overload trip temperature
T
jt
150 -- --
C
Thermal hysteresis
T
jt
-- 10 --
K
10)
Supply voltages higher than V
bb(AZ)
require an external current limit for the GND and status pins (a 150
resistor in the GND connection is recommended). See also V
ON(CL)
in table of protection functions and
circuit diagram page 9.
11
) Measured with load; for the whole device; all channels off
12
)
Add I
ST
, if I
ST
> 0
13
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
14
)
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
PROFET BTS 740 S2
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150C, V
bb
= 12 V unless otherwise specified
min typ
max
Semiconductor Group
6
2003-Oct-01
Reverse Battery
Reverse battery voltage
15
)
-V
bb
--
--
32
V
Drain-source diode voltage
(V
out
> V
bb
)
I
L
=
-
4.0
A, T
j
=
+150C
-V
ON
--
600
--
mV
Diagnostic Characteristics
Current sense ratio
16)
, static on-condition,
VIS = 0...5 V, Vbb(on) = 6.517)...27V,
kILIS = IL / IIS
T
j
= -40C, I
L
= 5 A:
k
ILIS
4350
4800
5800
T
j
= -40C, I
L
= 0.5 A:
3100 4800
7800
T
j
= 25...+150C, I
L
= 5 A:
T
j
= 25...+150C, I
L
= 0.5 A:
4350
3800
4800
4800
5350
6300
Current sense output voltage limitation
Tj = -40 ...+150C
IIS = 0, IL = 5 A:
V
IS(lim)
5.4
6.1
6.9
V
Current sense leakage/offset current
Tj = -40 ...+150C
VIN=0, VIS = 0, IL = 0:
I
IS(LL)
0
--
1
A
VIN=5 V, VIS = 0, IL = 0:
I
IS(LH)
0 --
15
VIN=5 V, VIS = 0, VOUT = 0
(short circuit)
I
IS(SH)
18
)
0 --
10
Current sense settling time to I
IS static
10% after
positive input slope
18)
,
IL = 0
5 A
t
son(IS)
--
--
300
s
Current sense settling time to 10% of I
IS
static after
negative input slope
18)
,
IL = 5
0 A
t
soff(IS)
--
30
100
s
Current sense rise time (60% to 90%) after change
of load current
18)
IL = 2.5
5 A
t
slc(IS)
--
10
--
s
Open load detection voltage
19
)
(off-condition)
V
OUT(OL)
2 3
4
V
Internal output pull down
(
pin 17,18 to 2 resp. 13,14 to 6), VOUT=5 V
R
O
5
15 40
k
15
) Requires a 150
resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and
circuit page 9).
16)
This range for the current sense ratio refers to all devices. The accuracy of the k
ILIS
can be raised at least by
a factor of two by matching the value of k
ILIS
for every single device.
In the case of current limitation the sense current I
IS
is zero and the diagnostic feedback potential
V
ST
is
High. See figure 2c, page 12.
17)
Valid if
V
bb(u rst)
was exceeded before.
18)
not subject to production test, specified by design
19)
External pull up resistor required for open load detection in off state.
PROFET BTS 740 S2
Parameter and Conditions,
each of the two channels
Symbol
Values
Unit
at T
j
= -40...+150C, V
bb
= 12 V unless otherwise specified
min typ
max
Semiconductor Group
7
2003-Oct-01
Input and Status Feedback
20
)
Input resistance
(see circuit page 9)
R
I
3.0
4.5 7.0
k
Input turn-on threshold voltage
V
IN(T+)
-- --
3.5
V
Input turn-off threshold voltage
V
IN(T-)
1.5 -- --
V
Input threshold hysteresis
V
IN(T)
-- 0.5 --
V
Off state input current
V
IN
= 0.4 V: I
IN(off)
1
-- 50
A
On state input current
V
IN
= 5 V: I
IN(on)
20 50 90
A
Delay time for status with open load
after Input neg. slope
(see diagram page 13)
t
d(ST OL3)
--
400
--
s
Status delay after positive input slope
(not subject to production test, specified by design)
t
don(ST)
--
13
--
s
Status delay after negative input slope
(not subject to production test, specified by design)
t
doff(ST)
--
1
--
s
Status output (open drain)
Zener limit voltage T
j
=-40...+150C, I
ST
= +1.6 mA:
ST low voltage
T
j
=-40...+25C, I
ST
= +1.6 mA:
T
j
= +150C, I
ST
= +1.6 mA:
V
ST(high)
V
ST(low)
5.4
--
--
6.1
--
--
6.9
0.4
0.7
V
Status leakage current,
VST = 5 V,
Tj=25 ... +150C:
I
ST(high)
--
--
2
A
20)
If ground resistors R
GND
are used, add the voltage drop across these resistors.
PROFET BTS 740 S2
Semiconductor Group
8
2003-Oct-01
Truth Table
Input 1
Output 1
Status 1
Current
Sense 1
Input 2
Output 2
Status 2
Current
Sense 2
level
level level
IIS
Normal
operation
L
H
L
H
H
L
0
nominal
Current-
limitation
L
H
L
H
H
H
0
0
Short circuit to
GND
L
H
L
L
21)
H
H
0
0
Over-
temperature
L
H
L
L
H
H
0
0
Short circuit to
V
bb
L
H
H
H
L
22)
L
0
<nominal
23)
Open load
L
H
L
24)
H
H (L
25)
)
L
0
0
Undervoltage L
H
L
L
H
L
0
0
Overvoltage L
H
L
L
H
L
0
0
Negative output
voltage clamp
L L H
0
L = "Low" Level
X = don't care
Z = high impedance, potential depends on external circuit
H = "High" Level Status signal after the time delay shown in the diagrams (see fig 5. page 13)
Parallel switching of channel 1 and 2 is possible by connecting the inputs and outputs in parallel. The status
outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. The current
sense outputs IS1 and IS2 have to be connected with a single pull-down resistor.
Terms
PROFET
V
IS1
ST1
GND1
bb
VST1
V
IN1
I ST1
I IN1
V
bb
Ibb
IGND1
17,18
2
Leadframe
3
5
IN1
VIS1
I IS1
VOUT1
VON1
I L1
OUT1
4
RGND1
Chip 1
PROFET
V
IS2
ST2
GND2
bb
VST2
V
IN2
I ST2
I IN2
IGND2
13,14
6
Leadframe
7
9
IN2
VIS2
I IS2
VOUT2
VON2
OUT2
8
I L2
RGND2
Chip 2
Leadframe (V
bb
) is connected to pin 1,10,11,12,15,16,19,20
External R
GND
optional; two resistors R
GND1
, R
GND2
=
150
or a single resistor R
GND
=
75
for reverse
battery protection up to the max. operating voltage.
21
) The voltage drop over the power transistor is V
bb
-V
OUT
> 3V typ. Under this condition the sense current
I
IS
is
zero
22)
An external short of output to V
bb
, in the off state, causes an internal current from output to ground. If R
GND
is used, an offset voltage at the GND and ST pins will occur and the V
ST low
signal may be errorious.
23
) Low ohmic short to
V
bb
may reduce the output current
I
L
and therefore also the sense current
I
IS
.
24
) Power Transistor off, high impedance
25
) with external resistor between V
BB
and OUT
PROFET BTS 740 S2
Semiconductor Group 9 2003-Oct-01
Input circuit (ESD protection),
IN1 or IN2
IN
GND
I
R
ESD-ZD
I
I
I
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
Status output,
ST1 or ST2
ST
GND
ESD-
ZD
+5V
R
ST(ON)
ESD-Zener diode: 6.1
V typ., max 5.0 mA; R
ST(ON)
< 375
at 1.6 mA. The use of ESD zener diodes as voltage clamp at
DC conditions is not recommended.
Current sense output
IS
GND
IS
R
IS
I
ESD-ZD
IS
V
ESD-Zener diode: 6.1 V typ., max 14 mA;
R
IS
= 1 k
nominal
Inductive and overvoltage output clamp,
OUT1 or OUT2
+Vbb
OUT
VZ
V
ON
Power GND
V
ON
clamped to V
ON(CL)
= 47 V typ.
Overvoltage and reverse batt. protection
+ Vbb
IN
IS
V
R
GND
GND
R
Signal GND
Logic
PROFET
VZ2
I
R
VZ1
Load GND
Load
R
OUT
ST
R
+ 5V
ST
IS
R
V
Z1
= 6.1 V typ., V
Z2
= 47 V typ., R
GND
= 150
,
R
ST
=15k
, R
I
=4.5k
typ., R
IS
=1k
, R
V
=15k
,
In case of reverse battery the current has to be limited
by the load. Temperature protection is not active
Open-load detection
OUT1 or OUT2
OFF-state diagnostic condition:
V
OUT
> 3 V typ.; IN low
Logic
ST
Out
V
OUT
Signal GND
R
EXT
R
O
OFF
V
bb
PROFET BTS 740 S2
Semiconductor Group 10 2003-Oct-01
GND disconnect
PROFET
V
IN
ST
OUT
GND
bb
V
bb
V
IN
V
ST
V
GND
Any kind of load. In case of IN
=
high is V
OUT
V
IN
-
V
IN(T+)
.
Due to V
GND
>
0, no V
ST
= low signal available.
GND disconnect with GND pull up
PROFET
V
IN
ST
OUT
GND
bb
V
bb
V
GND
V
IN
V
ST
Any kind of load. If V
GND
> V
IN
- V
IN(T+)
device stays off
Due to V
GND
>
0, no V
ST
= low signal available.
V
bb
disconnect with energized inductive
load
PROFET
V
IN
ST
OUT
GND
bb
V
bb
high
For inductive load currents up to the limits defined by Z
L
(max. ratings and diagram on page 10) each switch is
protected against loss of Vbb.
Consider at your PCB layout that in the case of Vbb dis-
connection with energized inductive load all the load current
flows through the GND connection.
Inductive load switch-off energy
dissipation
PROFET
V
IN
ST
OUT
GND
bb
=
E
E
E
EAS
bb
L
R
ELoad
RL
L
{
L
Z
Energy stored in load inductance:
E
L
=
1/2
L
I
2
L
While demagnetizing load inductance, the energy
dissipated in PROFET is
E
AS
= E
bb
+ E
L
- E
R
=
V
ON(CL)
i
L
(t) dt,
with an approximate solution for RL
>
0
:
E
AS
=
I
L
L
2
R
L
(
V
bb
+
|V
OUT(CL)
|)
ln
(1+
I
L
R
L
|V
OUT(CL)
|
)
Maximum allowable load inductance for
a single switch off
(one channel)
4)
L = f (IL );
Tj,start =
150C, Vbb =
12
V, RL =
0
ZL [mH]
1
10
100
1000
2
3
4
5
6
7
8
9
10 11 12
IL [A]
PROFET BTS 740 S2
Semiconductor Group 11 2003-Oct-01
Figure 1a: Switching a resistive load,
change of load current in on-condition:
IN
ST
OUT
L
t
V
I
IIS
t
son(IS)
t
t
slc(IS)
slc(IS)
Load 1
Load 2
soff(IS)
t
t
don(ST)
t
doff(ST)
t
t
on
off
The sense signal is not valid during settling time after turn or
change of load current.
Figure 1b: V
bb
turn on:
IN2
V
OUT1
t
V
bb
ST1 open drain
IN1
V
OUT2
ST2 open drain
proper turn on under all conditions
Figure 2a: Switching a resistive load,
turn-on/off time and slew rate definition:
IN
t
V
OUT
I
L
t
t
on
off
90%
dV/dton
dV/dtoff
10%
Figure 2b: Switching a lamp:
IN
ST
OUT
L
t
V
I
Timing diagrams
Both channels are symmetric and consequently the diagrams are valid for channel 1 and
channel 2
PROFET BTS 740 S2
Semiconductor Group 12 2003-Oct-01
Figure 2c: Switching a lamp with current limit:
IN
ST
OUT
L
t
V
I
IIS
Figure 2d: Switching an inductive load
IN
ST
L
t
V
I
OUT
I
L(OL)
*) if the time constant of load is too large, open-load-status may
occur
Figure 3a: Turn on into short circuit:
shut down by overtemperature, restart by cooling
other channel: normal operation
I
t
ST 1
IN1
L1
L(SCr)
I
I
L(lim)
toff(SC)
IS 1 = 0
Heating up of the chip may require several milliseconds, depending
on external conditions
Figure 3b: Turn on into short circuit:
shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)
t
S 1= IS 2 = 0
IN1/2
L1 L2
L(SCr)
I
2xIL(lim)
I + I
toff(SC)
ST 1/2
ST1 and ST2 have to be configured as a 'Wired OR' function
ST1/2 with a single pull-up resistor.
PROFET BTS 740 S2
Semiconductor Group 13 2003-Oct-01
Figure 4a: Overtemperature:
Reset if T
j
<T
jt
ST
J
t
T
IN
IL
IIS
Figure 5a: Open load: detection (with R
EXT
),
turn on/off to open load
IN
ST
OUT
t
V
I
open load
L
IIS
d(ST OL3)
t
Figure 6a: Undervoltage:
IN
V
t
bb
ST
V
V
bb(under)
bb(u cp)
V
IL
IIS
bb(u rst)
not defined
Figure 6b: Undervoltage restart of charge pump
bb(under)
V
V
bb(u rst)
V
bb(over)
V
bb(o rst)
V
bb(u cp)
off-
state
on-state
V
ON(CL)
V
bb
V
on
off-
state
charge pump starts at V
bb(ucp)
=4.7 V typ.
PROFET BTS 740 S2
Semiconductor Group 14 2003-Oct-01
Figure 7a: Overvoltage:
IN
V
t
bb
ST
ON(CL)
V
V
bb(over)
V
bb(o rst)
IL
IIS
Figure 8a: Current sense versus load current
26
::
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
0
1
2
3
4
5
6
I L
[A]
[mA]
IIS
26
This range for the current sense ratio refers to all
devices. The accuracy of the k
ILIS
can be raised at
least by a factor of two by matching the value of
k
ILIS
for every single device.
Figure 8b: Current sense ratio:
0
5000
10000
15000
0 1 2 3 4 5 6 7 8 9 10 11 12 13
IL
[A]
kILIS
Figure 9a: Output voltage drop versus load current:
0.0
0.1
0.2
0
1
2
3
4
5
6
7
8
I L
[A]
[V]
VON
ON(NL)
V
ON
R
PROFET BTS 740 S2
Semiconductor Group 15 2003-Oct-01
Package and Ordering Code
Standard: P-DSO-20-9
Sales Code
BTS 740 L2
Ordering
Code Q67060-S7012-A2
All dimensions in millimetres
Definition of soldering point with temperature T
s
:
upper side of solder edge of device pin 15.
Pin 15
Printed circuit board (FR4, 1.5mm thick, one layer
70
m, 6cm
2
active heatsink area) as a reference for
max. power dissipation P
tot
, nominal load current
I
L(NOM)
and thermal resistance R
thja
St.-Martin-Strasse 53,
D-81669 Mnchen
Infineon Technologies AG 2001
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and
shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement, regarding circuits, descriptions
and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives worldwide
(see address list).
Warnings
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support
devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system, or
to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons may be endangered.
PDF 
ZIP