ChipFind - документация

Электронный компонент: CD4504BMS

Скачать:  PDF   ZIP
7-1140
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
CD4504BMS
CMOS Hex Voltage Level Shifter for
TTL-to-CMOS or CMOS-to-CMOS Operation
Features
High Voltage Type (20V Rating)
Independence of Power Supply Sequence Consider-
ations
- VCC can Exceed VDD
- Input Signals can Exceed Both VCC and VDD
Up and Down Level Shifting Capability
Shiftable Input Threshold for Either CMOS or TTL
Compatibility
100% Tested for Quiescent Current at 20V
5V, 10V and 15V Parametric Ratings
Standardized Symmetrical Output Characteristics
Maximum Input Current of 1
A at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25
o
C
Meets All Requirements of JEDEC Tentative Standard
No. 13B, "Standard Specifications for Description of
`B' Series CMOS Devices"
Description
CD4504BMS hex voltage level shifter consists of six circuits
which shift input signals from the VCC logic level to the VDD
logic level. To shift TTL signals to CMOS logic levels, the
SELECT input is at the VCC HIGH logic state. When the
SELECT input is at a LOW logic state, each circuit translates
signals from one CMOS level to another.
The CD4504BMS is supplied in these 16-lead outline packages:
Frit Seal DIP
H1F
Ceramic Flatpack
H6W
December 1992
File Number
3336
Pinout
CD4504BMS
TOP VIEW
Functional Diagram
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
VCC
AOUT
AIN
BOUT
BIN
COUT
VSS
CIN
VDD
FIN
SELECT
EOUT
EIN
DOUT
DIN
FOUT
TTL/CMOS
MODE SELECT
LEVEL
SHIFTER
OUT
(2, 4, 6, 10, 12, 15)
(3, 5, 7, 9, 11, 14)
*
IN
*
13
SELECT
VCC = PIN 1
VDD = PIN 16
VSS = PIN 8
VDD
VSS
*
ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VCC
VDD
7-1141
Specifications CD4504BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .
10mA
Operating Temperature Range . . . . . . . . . . . . . . . . -55
o
C to +125
o
C
Package Types D, F, K, H
Storage Temperature Range (TSTG) . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265
o
C
At Distance 1/16
1/32 Inch (1.59mm
0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . .
ja
jc
Ceramic DIP and FRIT Package . . . . .
80
o
C/W
20
o
C/W
Flatpack Package . . . . . . . . . . . . . . . .
70
o
C/W
20
o
C/W
Maximum Package Power Dissipation (PD) at +125
o
C
For TA = -55
o
C to +100
o
C (Package Type D, F, K) . . . . . . 500mW
For TA = +100
o
C to +125
o
C (Package Type D, F, K) . . . . . Derate
Linearity at 12mW/
o
C to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175
o
C
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Supply Current
IDD
VDD = 20V, VIN = VDD or GND
1
+25
o
C
-
2
A
2
+125
o
C
-
200
A
VDD = 18V, VIN = VDD or GND
3
-55
o
C
-
2
A
Input Leakage Current
IIL
VIN = VDD or GND
VDD = 20
1
+25
o
C
-100
-
nA
2
+125
o
C
-1000
-
nA
VDD = 18V
3
-55
o
C
-100
-
nA
Input Leakage Current
IIH
VIN = VDD or GND
VDD = 20
1
+25
o
C
-
100
nA
2
+125
o
C
-
1000
nA
VDD = 18V
3
-55
o
C
-
100
nA
Output Voltage
VOL15
VDD = 15V, No Load
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
50
mV
Output Voltage
VOH15
VDD = 15V, No Load (Note 3)
1, 2, 3
+25
o
C, +125
o
C, -55
o
C 14.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1
+25
o
C
0.53
-
mA
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1
+25
o
C
1.4
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1
+25
o
C
3.5
-
mA
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1
+25
o
C
-
-0.53
mA
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1
+25
o
C
-
-1.8
mA
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1
+25
o
C
-
-1.4
mA
Output Current (Source)
IOH15
VDD = 15V, VOUT = 13.5V
1
+25
o
C
-
-3.5
mA
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10
A
1
+25
o
C
-2.8
-0.7
V
P Threshold Voltage
VPTH
VSS = 0V, IDD = 10
A
1
+25
o
C
0.7
2.8
V
Functional
F
VDD = 4.5V, VCC = 2.8,
VIN = VDD or GND
7
+25
o
C
VOH >
VDD/2
VOL <
VDD/2
V
VDD = 4.5V, VCC = 3.0,
VIN = VDD or GND
8B
-55
o
C
VDD = 18V, VCC = 18V,
VIN = GND or VCC
8A
+125
o
C
VDD = 18V, VCC = 4.5V,
VIN = VCC or GND
8A
+125
o
C
VDD = 4.5V, VCC = 18V,
VIN = VCC or GND
8A
+125
o
C
VDD = 20V, VCC = 20V,
VIN = GND or VCC
7
+25
o
C
VDD = 20V, VCC = 4.5V,
VIN = VCC or GND
7
+25
o
C
VDD = 4.5V, VCC = 20V,
VIN = VCC or GND
7
+25
o
C
7-1142
Specifications CD4504BMS
Input Voltage Low
(Note 2) TTL-CMOS
VIL
VDD = 15V, VOH > 13.5V, VOL < 1V
VCC = 5V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
0.8
V
Input Voltage High
(Note 2) TTL-CMOS
VIH
VDD = 15V, VOH > 13.5V, VOL < 1V
VCC = 5V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
2
-
V
Input Voltage Low
(Note 2) CMOS-CMOS
VIL
VDD = 10V, VOH > 9V, VOL < 1V
VCC = 5V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
1.5
V
Input Voltage High
(Note 2)CMOS-CMOS
VIH
VDD = 10V, VOH > 9V, VOL < 1V
VCC = 5V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
3.5
-
V
Input Voltage Low
(Note 2) CMOS-CMOS
VIL
VDD = 15V, VOH > 13.5V, VOL <
1.5V, VCC = 10V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
-
3
V
Input Voltage High
(Note 2) CMOS-CMOS
VIH
VDD = 15V, VOH > 13.5V, VOL <
1.5V, VCC = 10V
1, 2, 3
+25
o
C, +125
o
C, -55
o
C
7
-
V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS (NOTE 1, 2)
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Propagation Delay
TTL to CMOS
VDD > VCC
TPHL1
VDD = 10V, VIN = VCC or GND
VCC = 5V
9
+25
o
C
-
280
ns
10, 11
+125
o
C, -55
o
C
-
378
ns
Propagation Delay
CMOS to CMOS VDD >
VCC
TPHL2
VDD = 10V, VIN = VCC or GND
VCC = 5V
9
+25
o
C
-
240
ns
10, 11
+125
o
C, -55
o
C
-
324
ns
Propagation Delay
CMOS to CMOS VCC >
VDD
TPHL3
VDD = 5V, VIN = VCC or GND
VCC = 10V
9
+25
o
C
-
550
ns
10, 11
+125
o
C, -55
o
C
-
743
ns
Propagation Delay
TTL to CMOS
VDD > VCC
TPLH1
VDD = 10V, VIN = VCC or GND
VCC = 5V
9
+25
o
C
-
280
ns
10, 11
+125
o
C, -55
o
C
-
378
ns
Propagation Delay
CMOS to CMOS VDD >
VCC
TPLH2
VDD = 10V, VIN = VCC or GND
VCC = 5V
9
+25
o
C
-
240
ns
10, 11
+125
o
C, -55
o
C
-
324
ns
Propagation Delay
CMOS to CMOS VCC >
VDD
TPLH3
VDD = 5V, VIN = VCC or GND
VCC = 10V
9
+25
o
C
-
400
ns
10, 11
+125
o
C, -55
o
C
-
540
ns
Transition Time
TTHL
TTLH
All Modes
9
+25
o
C
-
200
ns
10, 11
+125
o
C, -55
o
C
-
270
ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55
o
C and +125
o
C limits guaranteed, 100% testing being implemented.
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
SYMBOL
CONDITIONS (NOTE 1)
GROUP A
SUBGROUPS
TEMPERATURE
LIMITS
UNITS
MIN
MAX
7-1143
Specifications CD4504BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Supply Current
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55
o
C, +25
o
C
-
1
A
+125
o
C
-
30
A
VDD = 10V, VIN = VDD or GND
1, 2
-55
o
C, +25
o
C
-
2
A
+125
o
C
-
60
A
VDD = 15V, VIN = VDD or GND
1, 2
-55
o
C, +25
o
C
-
2
A
+125
o
C
-
120
A
Output Voltage
VOL
VDD = 5V, No Load
1, 2
+25
o
C, +125
o
C,
-55
o
C
-
50
mV
Output Voltage
VOL
VDD = 10V, No Load
1, 2
+25
o
C, +125
o
C,
-55
o
C
-
50
mV
Output Voltage
VOH
VDD = 5V, No Load
1, 2
+25
o
C, +125
o
C,
-55
o
C
4.95
-
V
Output Voltage
VOH
VDD = 10V, No Load
1, 2
+25
o
C, +125
o
C,
-55
o
C
9.95
-
V
Output Current (Sink)
IOL5
VDD = 5V, VOUT = 0.4V
1, 2
+125
o
C
0.36
-
mA
-55
o
C
0.64
-
mA
Output Current (Sink)
IOL10
VDD = 10V, VOUT = 0.5V
1, 2
+125
o
C
0.9
-
mA
-55
o
C
1.6
-
mA
Output Current (Sink)
IOL15
VDD = 15V, VOUT = 1.5V
1, 2
+125
o
C
2.4
-
mA
-55
o
C
4.2
-
mA
Output Current (Source)
IOH5A
VDD = 5V, VOUT = 4.6V
1, 2
+125
o
C
-
-0.36
mA
-55
o
C
-
-0.64
mA
Output Current (Source)
IOH5B
VDD = 5V, VOUT = 2.5V
1, 2
+125
o
C
-
-1.15
mA
-55
o
C
-
-2.0
mA
Output Current (Source)
IOH10
VDD = 10V, VOUT = 9.5V
1, 2
+125
o
C
-
-0.9
mA
-55
o
C
-
-1.6
mA
Output Current (Source)
IOH15
VDD =15V, VOUT = 13.5V
1, 2
+125
o
C
-
-2.4
mA
-55
o
C
-
-4.2
mA
Input Voltage Low
TTL - CMOS
VIL
VDD = 10V, VOH > 9V,
VOL < 1V, VCC = 5V
1, 2
+25
o
C, +125
o
C,
-55
o
C
-
0.8
V
Input Voltage High
TTL - CMOS
VIH
VDD = 10V, VOH > 9V,
VOL < 1V, VCC = 5V
1, 2
+25
o
C, +125
o
C,
-55
o
C
2
-
V
Input Voltage Low
CMOS - CMOS
VIL
VDD = 15V, VOH > 13.5V,
VOL < 1.5V, VCC = 5V
1, 2
+25
o
C, +125
o
C,
-55
o
C
-
1.5
V
Input Voltage High
CMOS - CMOS
VIH
VDD = 15V, VOH > 13.5V,
VOL < 1.5V, VCC = 5V
1, 2
+25
o
C, +125
o
C,
-55
o
C
3.5
-
V
Propagation Delay
TTL - CMOS, VDD > VCC
TPHL1
VDD = 15V, VCC = 5V
1, 2, 3
+25
o
C
-
280
ns
Propagation Delay
CMOS - CMOS,
VDD > VCC
TPHL2
VDD = 15V, VCC = 5V
1, 2, 3
+25
o
C
-
240
ns
VDD = 15V, VCC = 10V
1, 2, 3
+25
o
C
-
140
ns
Propagation Delay
CMOS - CMOS,
VCC > VDD
TPHL3
VDD = 5V, VCC = 15V
1, 2, 3
+25
o
C
-
550
ns
VDD = 10V, VCC = 15V
1, 2, 3
+25
o
C
-
140
ns
Propagation Delay
TTL - CMOS, VDD > VCC
TPLH1
VDD = 15V, VCC = 5V
1, 2, 3
+25
o
C
-
280
ns
7-1144
Specifications CD4504BMS
Propagation Delay
CMOS - CMOS,
VDD > VCC
TPLH2
VDD = 15V, VCC = 5V
1, 2, 3
+25
o
C
-
240
ns
VDD = 15V, VCC = 10V
1, 2, 3
+25
o
C
-
140
ns
Propagation Delay
CMOS - CMOS
VCC > VDD
TPLH3
VDD = 5V, VCC = 15V
1, 2, 3
+25
o
C
-
400
ns
VDD = 10V, VCC = 15V
1, 2, 3
+25
o
C
-
120
ns
Transition Time
TTHL
TTLH
VDD = 10V
1, 2, 3
+25
o
C
-
100
ns
VDD = 15V
1, 2, 3
+25
o
C
-
80
ns
Input Capacitance
CIN
Any Input
1, 2
+25
o
C
-
7.5
pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
MAX
Supply Current
IDD
VDD = 20V, VIN = VDD or GND
1, 4
+25
o
C
-
7.5
A
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10
A
1, 4
+25
o
C
-2.8
-0.2
V
N Threshold Voltage
Delta
VTN
VDD = 10V, ISS = -10
A
1, 4
+25
o
C
-
1
V
P Threshold Voltage
VTP
VSS = 0V, IDD = 10
A
1, 4
+25
o
C
0.2
2.8
V
P Threshold Voltage
Delta
VTP
VSS = 0V, IDD = 10
A
1, 4
+25
o
C
-
1
V
Functional
F
VDD = 18V, VIN = VDD or GND
1
+25
o
C
VOH >
VDD/2
VOL <
VDD/2
V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
1, 2, 3, 4
+25
o
C
-
1.35 x
+25
o
C
Limit
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25
o
C limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25
o
C
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-1
IDD
0.2
A
Output Current (Sink)
IOL5
20% x Pre-Test Reading
Output Current (Source)
IOH5A
20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
READ AND RECORD
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
IDD, IOL5, IOH5A
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
MAX