ChipFind - документация

Электронный компонент: IPS031G

Скачать:  PDF   ZIP
/home/web/doc/html/irf/174362
background image
Features
Over temperature shutdown
Over current shutdown
Active clamp
Low current & logic level input
E.S.D protection
IPS031G/IPS032G
SINGLE/DUAL FULLY PROTECTED POWER MOSFET SWITCH
Data Sheet No.PD 60151-J
Description
The IPS031G/IPS032G are fully protected single/dual
low side SMART POWER MOSFETs that feature over-
current, over-temperature, ESD protection and drain
to source active clamp.These devices combine a
HEXFET POWER MOSFET and a gate driver. They
offer full protection and high reliability required in
harsh environments. The driver allows short switch-
ing times and provides efficient protection by turning
off the power MOSFET when the temperature ex-
ceeds 165
o
C or when the drain current reaches 12A.
The device restarts once the input is cycled. The
avalanche capability is significantly enhanced by the
active clamp and covers most inductive load demag-
netizations.
Product Summary
R
ds(on)
70m
(max)
V
clamp
50V
Ishutdown
12A
T
on
/T
off
1.5
s
Typical Connection
S
Q
Load
D
S
control
IN
R in series
(if needed)
Logic signal
www.irf.com
1
Packages
8-Lead SOIC
IPS031G
16-Lead SOIC
IPS032G
(Dual)
(Refer to lead assignment for correct pin assignment)
background image
IPS031G/IPS032G
2
www.irf.com
(1) Limited by junction temperature (pulsed current limited also by internal wiring)
31
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are ref-
erenced to SOURCE lead. (TAmbient = 25
o
C unless otherwise specified). PCB mounting uses the standard footprint with 70
m
copper thickness. All Sources leads of each mosfet must be connected together to get full current capability
Symbol Parameter
Min.
Max.
Units
Test Conditions
Vds
Maximum drain to source voltage
--
47
Vin
Maximum input voltage
-0.3
7
Iin, max
Maximum IN current
-10
+10
mA
Isd
cont.
Diode max. continuous current
(1)
(rth=125
o
C/W) IPS031G
--
1.4
(for all sd mosfets, rth=85
o
C/W) IPS032G
--
2
Isd
pulsed
Diode max. pulsed current
(1) (for ea. mosfet)
--
15
Pd
Maximum power dissipation
(1)
(rth=125
o
C/W) IPS031G
--
1
W
(for all
Pd mosfets, rth=85
o
C/W) IPS032G
--
1.5
ESD1
Electrostatic discharge voltage
(Human Body)
--
4
C=100pF, R=1500
,
ESD2
Electrostatic discharge voltage
(Machine Model)
--
0.5
C=200pF, R=0
,
L=10
H
T stor.
Max. storage temperature
-55
150
Tj max.
Max. junction temperature
-40
150
V
A
kV
Symbol Parameter
Min.
Typ.
Max. Units Test Conditions
Rth1
Thermal resistance with standard footprint
--
100
--
Rth2
Thermal resistance with 1" square footprint
--
65
--
Rth1
Thermal resistance with standard footprint
(2 mos on)
(2 mosfets on)
--
85
--
Rth2
Thermal resistance with standard footprint
(1 mos on)
(1 mosfet on)
--
100
--
Rth3
Thermal resistance with 1" square footprint
(2 mos on)
(2 mosfets on)
--
60
--
Thermal Chacteristics
SOIC-8
SOIC-16
o
C/W
o
C
background image
IPS031G/IPS032G
www.irf.com
3
Recommended Operating Conditions
These values are given for a quick design. For operation outside these conditions, please consult the application notes.
Symbol Parameter
Min.
Max. Units
Vds (max) Continuous Drain to Source voltage
--
35
VIH
High level input voltage
4
6
VIL
Low level input voltage
0
0.5
Ids
Continuous drain current
Tamb=85
o
C
(TAmbient = 85
o
C, IN = 5V, rth = 100
o
C/W, Tj = 125
o
C) IPS031G
--
2.2
A
(TAmbient = 85
o
C, IN = 5V, rth = 85
o
C/W, Tj = 125
o
C) IPS032G
-- 1.65
Rin
Recommended resistor in series with IN pin
0.2
5
k
Tr-in(max) Max recommended rise time for IN signal (see fig. 2)
--
1
S
Fr-Isc
(2)
Max. frequency in short circuit condition (Vcc = 14V)
0
1
kHz
V
Symbol Parameter
Min.
Typ.
Max. Units Test Conditions
Rds(on)
ON state resistance Tj = 25
o
C
20
45
60
Rds(on)
ON state resistance Tj = 150
o
C
--
75
100
Idss
Drain to source leakage current
0
0.5
25
Vcc = 14V, Tj = 25
o
C
@Tj=25
o
C
Idss2
Drain to source leakage current
0
5
50
Vcc = 40V, Tj = 25
o
C
@Tj=25
o
C
V
clamp 1
Drain to source clamp voltage 1
47
52
56
Id = 20mA
(see Fig.3 & 4)
V
clamp 2
Drain to source clamp voltage 2
50
53
60
Vin
clamp
IN to source clamp voltage
7
8.1
9.5
Iin = 1 mA
Vth
IN threshold voltage
1
1.6
2
Id = 50mA, Vds = 14V
Iin, -on
ON state IN positive current
25
90
200
Vin = 5V
Iin, -off
OFF state IN positive current
50
130
250
Vin = 5V
over-current triggered
Static Electrical Characteristics
(Tj = 25
o
C unless otherwise specified.)
m
Vin = 5V, Ids = 1A
Id=Ishutdown
(see Fig.3 & 4)
V
A
A
Switching Electrical Characteristics
Vcc = 14V, Resistive Load = 5
(IPS031), Resistive Load = 3
(IPS031S), Rinput = 50
,
100
s pulse,T
j
= 25
o
C, (unless
otherwise specified).
Symbol Parameter
Min.
Typ.
Max. Units Test Conditions
Ton
Turn-on delay time
0.05
0.3
0.6
Tr
Rise time
0.4
1
2
Trf
Time to 130% final Rds(on)
--
8
--
Toff
Turn-off delay time
0.8
2
3.5
Tf
Fall time
0.5
1.5
2.5
Qin
Total gate charge
--
1.1
--
nC
Vin = 5V
See figure 2
See figure 2
s
background image
IPS031G/IPS032G
4
www.irf.com
Lead Assignments
Part Number
IPS031G
IPS032G
Functional Block Diagram
Symbol Parameter
Min.
Typ.
Max. Units Test Conditions
Tsd
Over temperature threshold
--
165
--
o
C
See fig. 1
Isd
Over current threshold
10
14
18
A
See fig. 1
V
reset
IN protection reset threshold
1.5
2.3
3
V
Treset
Time to reset protection
2
10 40
s Vin = 0V, Tj = 25
o
C
EOI_OT
Short circuit energy (see application note)
--
400
--
J
Vcc = 14V
Protection Characteristics
All values are typical
IN
DRAIN
SOURCE
8.1 V
80
A
47 V
I sense
200 k
300
S
Q
R
Q
T > 165c
I > 1sd
16 Lead SOIC
(Dual)
S1 S1 S1 I1 S2 S2 S2 I2
D1
D1 D1 D1 D2 D2 D2 D2
1
8 Lead SOIC
1
S S S In
D D D D
background image
IPS031G/IPS032G
www.irf.com
5
Figure 1 - Timing diagram
Tr-in
10 %
90 %
90 %
10 %
Td on
Td off
tf
tr
Ids
Tr-in
Vin
Vds
Figure 2 - IN rise time & switching time definitions
Tsd
(165 c)
Vin
Ids
Isd
I shutdown
T
T shutdown
t < T reset
t > T reset
5 V
0 V
14 V
IN
D
S
5 v
0 v
L
R
+
-
Vds
Ids
Vin
V load
Rem : V load is negative
during demagnetization
Figure 4 - Active clamp test circuit
Ids
Vds
Vin
T clamp
Vds clamp
( Vcc )
( see Appl . Notes to evaluate power dissipation )
Figure 3 - Active clamp waveforms