www.docs.chipfind.ru
Data Sheet No. PD60208 Rev. E
IR2175(S) & (PbF)
Block Diagram
Packages
Product Summary
V
OFFSET
600Vmax
I
QBS
2mA
Vin
+/-260mVmax
Gain temp.drift
20ppm/
o
C (typ.)
fo
130kHz (typ.)
Overcurrent trip
2
sec (typ)
signal delay
Overcurrent trip level +/-260mV (typ.)
LINEAR CURRENT SENSING IC
8 Lead PDIP
IR2175
8 Lead SOIC
IR2175S
Features
Floating channel up to +600V
Monolithic integration
Linear current feedback through shunt resistor
Direct digital PWM output for easy interface
Low I
QBS
allows the boot strap power supply
Independent fast overcurrent trip signal
High common mode noise immunity
Input overvoltage protection for IGBT short circuit
condition
Open Drain outputs
Also available LEAD-FREE
Description
The IR2175 is a monolithic current sensing IC designed
for motor drive applications. It senses the motor phase
current through an external shunt resistor, converts from
analog to digital signal, and transfers the signal to the
low side. IR's proprietary high voltage isolation tech-
nology is implemented to enable the high bandwidth
signal processing. The output format is discrete PWM
to eliminate need for the A/D input interface for the
IR2175. The dedicated overcurrent trip (OC) signal fa-
cilitates IGBT short circuit protection. The open-drain
outputs make easy for any interface from 3.3V to 15V. S
(Refer to Lead Assignments for cor-
rect pin configuration). This/These
diagram(s) show electrical connec-
tions only. Please refer to our Appli-
cation Notes and DesignTips for
proper circuit board layout.
VB
V+
VS
VCC
PO
COM
IR2175
GND
15V
To Motor Phase
PWM Output
Up to 600V
OC
Overcurrent
2
IR2175
(S) & (PbF)
www.irf.com
Recommended Operating Conditions
The output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended
conditions.
Note 1: Capacitors are required between V
B
and Vs when bootstrap power is used. The external power supply,
when used, is required between V
B
and Vs pins.
Symbol Definition
Min.
Max.
Units
V
B
High side floating supply voltage
V
S
+13.0
V
S
+20
V
S
High side floating supply offset voltage
0.3
600
V
PO
Digital PWM output voltage
COM
VCC
V
OC
Overcurrent output voltage
COM
VCC
V
CC
Low side and logic fixed supply voltage
9.5
20
V
IN
Input voltage between V
IN+
and V
S
-260
+260
mV
T
A
Ambient temperature
-40
125
C
V
Symbol Definition
Min.
Max.
Units
V
S
High side offset voltage
-0.3
600
V
BS
High side floating supply voltage
-0.3
25
V
CC
Low side and logic fixed supply voltage
-0.3
25
V
IN
Maximum input voltage between V
IN+ and
V
S
-5
5
V
PO
Digital PWM output voltage
COM -0.3
VCC +0.3
V
OC
Overcurrent output voltage
COM -0.3
VCC +0.3
dV/dt
Allowable offset voltage slew rate
--
50
V/ns
P
D
Package power dissipation @ T
A
+25
C
8 lead SOIC
--
.625
8 lead PDIP
--
1.0
Rth
JA
Thermal resistance, junction to ambient
8 lead SOIC
--
200
8 lead PDIP
--
125
T
J
Junction temperature
--
150
T
S
Storage temperature
-55
150
T
L
Lead temperature (soldering, 10 seconds)
--
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
V
C/W
W
C
3
IR2175
(S) & (PbF)
www.irf.com
Note 1:
10mV offset represents
1.5% duty cycle fluctuation
Note 2: Gain = (full range of duty cycle in %) / (full input voltage range).
V
IN
Nominal input voltage range before saturation
-260
--
260
V
IN+ _
V
S
V
OC+
Overcurrent trip positive input voltage
--
260
--
V
OC-
Overcurrent trip negative input voltage
--
-260
--
V
OS
Input offset voltage
-10
0
10
V
IN
= 0V (Note 1)
V
OS
/
T
A
Input offset voltage temperature drift
--
25
--
V/
o
C
G
Gain (duty cycle % per V
IN
)
155 160
165
%/V
max gain error=5%
(Note 2)
G
/
T
A
Gain temperature drift
--
20
--
ppm/
o
C
I
LK
Offset supply leakage current
--
--
50
A
V
B
= V
S
= 600V
I
QBS
Quiescent V
BS
supply current
--
2
--
V
S
= 0V
I
QCC
Quiescent V
CC
supply current
--
--
0.5
LIN
Linearity (duty cycle deviation from ideal linearity
--
0.5
1
%
curve)
V
LIN
/
T
A
Linearity temperature drift
--
.005
--
%/
o
C
I
OPO
Digital PWM output sink current
20
--
--
2
--
--
I
OCC
OC output sink current
10
--
--
1
--
--
DC Electrical Characteristics
V
CC
= V
BS
= 15V, and T
A
= 25
o
unless otherwise specified.
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
mA
mV
mA
V
O
= 1V
V
O
= 0.1V
V
O
= 1V
V
O
= 0.1V
Symbol
Definition
Min.
Typ. Max. Units Test Conditions
Propagation delay characteristics
fo
Carrier frequency output
100
130
180
kHz
f
/
T
A
Temperature drift of carrier frequency
--
500
--
ppm/
o
C
Dmin
Minimum duty
--
9
--
%
Dmax
Maximum duty
--
91
--
%
VIN+=+260mV
BW
fo bandwidth
--
15
--
kHz
PHS
Phase shift at 1kHz
--
-10
--
o
tdoc
Propagation delay time of OC
1
2
--
twoc
Low true pulse width of OC
--
1.5
--
AC Electrical Characteristics
V
CC
= V
BS
= 15V, and T
A
= 25
o
unless otherwise specified.
figure 1
V
IN
= 0 & 5V
VIN+=-260mV,
V
IN+ = 100mVpk -pk
sine wave, gain=-3dB
V
IN
+ =100mVpk-pk
sine wave
sec
4
IR2175
(S) & (PbF)
www.irf.com
Application Hint:
Temperature drift of the output carrier frequency can be cancelled by measuring both a PWM period and the on-time
of PWM (Duty) at the same time. Since both periods vary in the same direction, computing the ratio between these
values at each PWM period gives consistent measurement of the current feedback over the temperature drift.
Vin+= -260mV
Vs = 0V
Vin+= +260mV
Vs = 0V
Duty=91%
Duty=9%
Carrier Frequency =
130kHz
PO
PO
Timing Waveforms
Figure 1 Output waveform
5
IR2175
(S) & (PbF)
www.irf.com
Lead Assignment
Lead Definitions
Symbol Description
V
CC
Low side and logic supply voltage
COM
Low side logic ground
V
IN+
Positive sense input
V
B
High side supply
V
S
High side return
PO
Digital PWM output
OC
Overcurrent output (negative logic)
N.C.
No connection
IR2175S
IR2175
8
7
6
4
3
2
1
VC
C
OC
PO
COM
NC
Vs
VIN
+
V
B
5
8
7
6
4
3
2
1
VC
C
OC
PO
COM
NC
Vs
VIN
+
V
B
5
8 lead SOIC
Also available LEAD-FREE (PbF)
8 lead PDIP
Also available LEAD-FREE (PbF)
PDF 
ZIP