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Электронный компонент: IRF1104S

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IRF1104S/L
HEXFET
Power MOSFET
PD -91845
l
Advanced Process Technology
l
Ultra Low On-Resistance
l
Surface Mount (IRF1104S)
l
Low-profile through-hole (IRF1104L)
l
175C Operating Temperature
l
Fast Switching
l
Fully Avalanche Rated
Parameter
Typ.
Max.
Units
R
JC
Junction-to-Case
0.9
R
JA
Junction-to-Ambient(PCB Mounted,steady-state)**
62
Thermal Resistance
C/W
Parameter
Max.
Units
I
D
@ T
C
= 25C
Continuous Drain Current, V
GS
@ 10V
100
I
D
@ T
C
= 100C
Continuous Drain Current, V
GS
@ 10V
71
A
I
DM
Pulsed Drain Current
400
P
D
@T
A
= 25C
Power Dissipation
2.4
W
P
D
@T
C
= 25C
Power Dissipation
170
W
Linear Derating Factor
1.1
W/C
V
GS
Gate-to-Source Voltage
20
V
E
AS
Single Pulse Avalanche Energy
350
mJ
I
AR
Avalanche Current
60
A
E
AR
Repetitive Avalanche Energy
17
mJ
dv/dt
Peak Diode Recovery dv/dt
5.0
V/ns
T
J
Operating Junction and
-55 to + 175
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
C
Absolute Maximum Ratings
Fifth Generation HEXFETs from International Rectifier utilize
advanced processing techniques to achieve extremely low
on-resistance per silicon area. This benefit, combined with
the fast switching speed and ruggedized device design that
HEXFET Power MOSFETs are well known for, provides the
designer with an extremely efficient and reliable device for
use in a wide variety of applications.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-resistance
in any existing surface mount package. The D
2
Pak is
suitable for high current applications because of its low
internal connection resistance and can dissipate up to 2.0W
in a typical surface mount application.
The through-hole version (IRF1104L) is available for low-
profile applications.
Description
2
D P ak

T O -26 2
S
D
G
11/20/98
www.irf.com
1
V
DSS
= 40V
R
DS(on)
= 0.009
I
D
= 100A
IRF1104S/L
2
www.irf.com
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
I
SD
60A, di/dt
304A/s, V
DD
V
(BR)DSS
,
T
J
175C
Notes:
Starting T
J
= 25C, L = 194H
R
G
= 25
, I
AS
= 60A. (See Figure 12)
Pulse width
300s; duty cycle
2%.
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Uses IRF1104 data and test conditions.
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
S
Continuous Source Current
MOSFET symbol
(Body Diode)
showing the
I
SM
Pulsed Source Current
integral reverse
(Body Diode)
p-n junction diode.
V
SD
Diode Forward Voltage
1.3
V
T
J
= 25C, I
S
=60A, V
GS
= 0V
t
rr
Reverse Recovery Time
74
110
ns
T
J
= 25C, I
F
=60A
Q
rr
Reverse Recovery Charge
188
280
nC
di/dt = 100A/s
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
A
100
400
S
D
G
Calculated continuous current based on maximum allowable
junction temperature;for recommended current-handling of the
package refer to Design Tip # 93-4
Parameter
Min. Typ. Max. Units
Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage
40
V
V
GS
= 0V, I
D
= 250A
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
0.038
V/C
Reference to 25C, I
D
= 1mA
R
DS(on)
Static Drain-to-Source On-Resistance
0.009
V
GS
= 10V, I
D
= 60A
V
GS(th)
Gate Threshold Voltage
2.0
4.0
V
V
DS
= V
GS
, I
D
= 250A
g
fs
Forward Transconductance
37
S
V
DS
= 30V, I
D
= 60A
25
A
V
DS
= 40V, V
GS
= 0V
250
V
DS
= 32V, V
GS
= 0V, T
J
= 150C
Gate-to-Source Forward Leakage
100
V
GS
= 20V
Gate-to-Source Reverse Leakage
-100
nA
V
GS
= -20V
Q
g
Total Gate Charge
93
I
D
= 60A
Q
gs
Gate-to-Source Charge
29
nC
V
DS
= 32V
Q
gd
Gate-to-Drain ("Miller") Charge
30
V
GS
= 10V, See Fig. 6 and 13
t
d(on)
Turn-On Delay Time
15
V
DD
= 20V
t
r
Rise Time
114
I
D
= 60A
t
d(off)
Turn-Off Delay Time
28
R
G
= 3.6
t
f
Fall Time
19
R
D
= 0.33
, See Fig. 10
Between lead,
and center of die contact
C
iss
Input Capacitance
2900
V
GS
= 0V
C
oss
Output Capacitance
1100
pF
V
DS
= 25V
C
rss
Reverse Transfer Capacitance
250
= 1.0MHz, See Fig. 5
Electrical Characteristics @ T
J
= 25C (unless otherwise specified)
I
GSS
ns
I
DSS
Drain-to-Source Leakage Current
nH
7.5
L
S
Internal Source Inductance
IRF1104S/L
www.irf.com
3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
1
10
100
1000
0.1
1
10
100
20s PULSE WIDTH
T = 175 C
J
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
1
10
100
1000
0.1
1
10
100
20s PULSE WIDTH
T = 25 C
J
TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I , Drain-to-Source Current (A)
DS
D
4.5V
0.1
1
10
100
1000
4.0
5.0
6.0
7.0
8.0
9.0
10.0
V = 50V
20s PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I , Drain-to-Source Current (A)
GS
D
T = 175 C
J
T = 25 C
J
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
0.0
0.5
1.0
1.5
2.0
2.5
T , Junction Temperature( C)
R , Drain-to-Source On Resistance
(Normalized)
J
DS(on)
V
=
I =
GS
D
10V
100A
IRF1104S/L
4
www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1
10
100
0
1000
2000
3000
4000
5000
V , Drain-to-Source Voltage (V)
C, Capacitance (pF)
DS
V
C
C
C
=
=
=
=
0V,
C
C
C
f = 1MHz
+ C
+ C
C SHORTED
GS
iss
gs
gd ,
ds
rss
gd
oss
ds
gd
Ciss
Coss
Crss
0.1
1
10
100
1000
0.2
0.8
1.4
2.0
2.6
V ,Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
V = 0 V
GS
T = 25 C
J
T = 175 C
J
1
10
100
1000
10000
1
10
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 175 C
= 25 C
J
C
V , Drain-to-Source Voltage (V)
I , Drain Current (A)
I , Drain Current (A)
DS
D
10us
100us
1ms
10ms
0
25
50
75
100
0
5
10
15
20
Q , Total Gate Charge (nC)
V , Gate-to-Source Voltage (V)
G
GS
FOR TEST CIRCUIT
SEE FIGURE
I =
D
13
60A
V
= 20V
DS
V
= 32V
DS
IRF1104S/L
www.irf.com
5
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
V
DS
Pulse Width
1
s
Duty Factor
0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
0.01
0.1
1
0.00001
0.0001
0.001
0.01
0.1
1
Notes:
1. Duty factor D = t / t
2. Peak T = P
x Z
+ T
1
2
J
DM
thJC
C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response
(Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
25
50
75
100
125
150
175
0
20
40
60
80
100
T , Case Temperature ( C)
I , Drain Current (A)
C
D
LIMITED BY PACKAGE