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HIN
up to 600 V
TO
LOAD
V
CC
V
B
V
S
HO
LO
COM
HIN
DT
V
SS
LIN
V
CC
LIN
V
SS
R
DT
V
CC
V
B
V
S
HO
LO
COM
HIN
LIN
LIN
HIN
up to 600 V
TO
LOAD
V
CC
Typical Connection
HALF-BRIDGE DRIVER
Features
Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt
immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V and 5 V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/- 5 V offset
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4 A/1.8 A
IRS21834
IRS2183
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1
IRS2183/IRS21834(S)PbF
Data Sheet No. PD60265
(Refer to Lead Assignment for correct pin
configuration) These diagrams show electrical
connections only. Please refer to our Application
Notes and DesignTips for proper circuit board layout.
Description
The IRS2183/IRS21834 are high voltage,
high speed power MOSFET and IGBT
drivers with dependent high and low
side referenced output channels. Pro-
prietary HVIC and latch immune CMOS
technologies enable ruggedized mono-
lithic construction. The logic input is
compatible with standard CMOS or
LSTTL output, down to 3.3 V logic. The
output drivers feature a high pulse cur-
rent buffer stage designed for minimum
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT
in the high side configuration which operates up to 600 V.
Feature Comparison
Part
Input
logic
Cross-
conduction
prevention
logic
Deadtime
(ns)
Ground Pins
Ton/Toff
(ns)
2181
COM
21814
HIN/LIN
no
none
V
SS
/COM
180/220
2183
Internal 5000
COM
21834
HIN/LIN
yes
Program 400-5000
V
SS/
COM
180/220
2184
Internal 5000
COM
21844
IN/SD
yes
Program 400-5000
V
SS
/COM
680/270
Packages
8-Lead PDIP
IRS2183
8-Lead SOIC
IRS2183S
14-Lead PDIP
IRS21834
14-Lead SOIC
IRS21834S
IRS2183/IRS21834(S)PbF
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Symbol
Definition
Min.
Max.
Units
V
B
High side floating absolute voltage
-0.3
620 (Note 1)
V
S
High side floating supply offset voltage
V
B
- 20
V
B
+ 0.3
V
HO
High side floating output voltage
V
S
- 0.3
V
B
+ 0.3
V
CC
Low side and logic fixed supply voltage
-0.3
20 (Note 1)
V
LO
Low side output voltage
-0.3
V
CC
+ 0.3
DT Programmable deadtime pin voltage (IR21834 only)
V
SS
- 0.3 V
CC
+ 0.3
V
IN
Logic input voltage (HIN &
LIN
)
V
SS
- 0.3
V
CC
+ 0.3
V
SS
Logic ground (IR21834 only)
V
CC
- 20
V
CC
+ 0.3
dV
S
/dt
Allowable offset supply voltage transient
--
50
V/ns
(8-lead PDIP)
--
1.0
P
D
Package power dissipation @ T
A
+25
C
(8-lead SOIC)
--
0.625
(14-lead PDIP)
-- 1.6
(14-lead SOIC)
--
1.0
(8-lead PDIP)
--
125
Rth
JA
Thermal resistance, junction to ambient
(8-lead SOIC)
--
200
(14-lead PDIP)
--
75
(14-lead SOIC)
--
120
T
J
Junction temperature
--
150
T
S
Storage temperature
-50
150
T
L
Lead temperature (soldering, 10 seconds)
--
300
V
C
C/W
W
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Note 2: Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Recommended Operating Conditions
The
input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. The V
S
and V
SS
offset rating are tested with all supplies biased at 15 V differential.
V
B
High side floating supply absolute voltage V
S
+ 10
V
S
+ 20
V
S
High side floating supply offset voltage Note 2 600
V
HO
High side floating output voltage
V
S
V
B
V
CC
Low side and logic fixed supply voltage
10
20
V
LO
Low side output voltage
0
V
CC
V
IN
Logic input voltage (HIN &
LIN
) V
SS
V
CC
)
V
SS
V
CC
DT Programmable deadtime pin voltage (IR21834 only)
V
SS
V
CC
V
SS
Logic ground (IR21834 only)
-5
5
T
A
Ambient temperature
-40
125
C
V
Symbol
Definition
Min.
Max.
Units
Note 1: All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
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3
IRS2183/IRS21834(S)PbF
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, DT= V
SS
and T
A
= 25
C unless otherwise specified. The V
IL
, V
IH,
and I
IN
parameters are referenced to V
SS
/COM and are applicable to the respective input leads: HIN and LIN. The V
O
, I
O,
and
Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
V
IH
Logic "1" input voltage for HIN & logic "0" for
LIN 2.5 -- --
V
IL
Logic "0" input voltage for HIN & logic "1" for
LIN
--
--
0.8
V
OH
High level output voltage, V
BIAS
- V
O
--
--
1.2
I
O
= 0 A
V
OL
Low level output voltage, V
O
--
--
0.2
I
O
= 20 mA
I
LK
Offset supply leakage current
--
--
50
V
B
= V
S
= 600 V
I
QBS
Quiescent V
BS
supply current
20
60
150
I
QCC
Quiescent V
CC
supply current
0.4
1.0
1.6
mA
I
IN+
Logic "1" input bias current
--
25
60
HIN = 5 V,
LIN
= 0 V
I
IN-
Logic "0" input bias current
--
--
1.0
HIN = 0 V,
LIN
= 5 V
V
CCUV+
V
CC
and V
BS
supply undervoltage positive going
8.0
8.9
9.8
V
BSUV+
threshold
V
CCUV-
V
CC
and V
BS
supply undervoltage negative going
7.4
8.2
9.0
V
BSUV-
threshold
V
CCUVH
Hysteresis
0.3
0.7
--
V
BSUVH
I
O+
Output high short circuit pulsed current
1.4
1.9
--
V
O
= 0 V,
PW
10
s
I
O-
Output low short circuit pulsed current
1.8
2.3
--
V
O
= 15 V,
PW
10
s
V
A
A
V
A
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, V
SS
= COM, C
L
= 1000 pF, T
A
= 25
C, DT = V
SS
unless otherwise specified.
Symbol
Definition
Min. Typ.
Max. Units Test Conditions
ton
Turn-on propagation delay
--
180
270
VS = 0V
toff
Turn-off propagation delay
--
220
330
V
S
= 0V or 600V
MT
Delay matching
|
ton - toff
|
--
0
35
tr
Turn-on rise time
--
40
60
tf
Turn-off fall time
--
20
35
DT
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
280
400
520
R
DT
= 0
HO turn-off to LO turn-on (DT
HO-LO)
4
5
6
s
R
DT
= 200 k
(IR21834)
MDT
Deadtime matching =
|
DT
LO-HO
- DT
HO-LO
|
--
0
50
R
DT
=0
--
0
600
R
DT
= 200k
(IR21834)
ns
ns
V
S
= 0 V
V
CC
= 10 V to 20 V
V
IN
= 0 V or 5 V
IRS2183/IRS21834(S)PbF
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4
Functional Block Diagrams
2183
LIN
+5V
UV
DETECT
DELAY
COM
LO
VCC
HIN
DT
VSS
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
DEADTIME &
SHOOT-THROUGH
PREVENTION
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
21834
LIN
UV
DETECT
DELAY
HIN
DT
VSS
VS
HO
VB
PULSE
FILTER
HV
LEVEL
SHIFTER
R
R
S
Q
UV
DETECT
DEADTIME &
SHOOT-THROUGH
PREVENTION
PULSE
GENERATOR
VSS/COM
LEVEL
SHIFT
VSS/COM
LEVEL
SHIFT
+5V
COM
LO
VCC
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5
IRS2183/IRS21834(S)PbF
14-Lead PDIP
14-Lead SOIC
IRS21834PbF
IRS21834SPbF
Lead Assignments
8-Lead PDIP
8-Lead SOIC
Lead Definitions
Symbol Description
HIN
Logic input for high side gate driver output (HO), in phase (referenced to COM for IRS2183
and VSS for IRS21834)
Logic input for low side gate driver output (LO), out of phase (referenced to COM for IRS2183
and VSS for IRS21834)
DT
Programmable deadtime lead, referenced to VSS. (IRS21834 only)
VSS
Logic ground (IRS21834 only)
V
B
High side floating supply
HO
High side gate driver output
V
S
High side floating supply return
V
CC
Low side and logic fixed supply
LO
Low side gate driver output
COM
Low side return
LIN
IRS2183PbF
IRS2183SPbF
1
2
3
4
8
7
6
5
HIN
LIN
COM
LO
VB
HO
VS
VCC
1
2
3
4
8
7
6
5
HIN
LIN
COM
LO
VB
HO
VS
VCC
1
2
3
4
5
6
7
1
4
13
12
11
10
9
8
HIN
LIN
VSS
DT
COM
LO
VCC
VB
HO
VS
1
2
3
4
5
6
7
1
4
13
12
11
10
9
8
HIN
LIN
VSS
DT
COM
LO
VCC
VB
HO
VS
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