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Электронный компонент: IRS2453D

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1
Typical Connection Diagram
LOAD
14
13
12
11
10
9
8
1
2
3
4
5
6
7
IRS2453D
VCC
CT
RT
LO1
LO2
SD
VB1
HO1
VS1
VB2
HO2
VS2
COM
NC
+ AC rectified line
- AC rectified line
15V
*
Please note that this datasheet contains advanced information which could change before the
product is released to production
.
Data Sheet No. PD
60259
ADVANCE INFORMATION
IRS2453D(S)PbF
SELF-OSCILLATING FULL-BRIDGE DRIVER IC

Features
Integrated 600V Full-Bridge Gate Driver

CT, RT programmable oscillator
15.6V Zener Clamp on VCC
Micropower Startup
Logic Level Latched Shutdown Pin
Non-latched shutdown on CT pin (1/6th VCC)
Internal bootstrap FETs
Excellent Latch Immunity on All Inputs & Outputs
ESD Protection on All Pins
14-lead SOIC or PDIP package
1.0 usec (typ.) internal deadtime
Description
The IRS2453D is based on the popular IR2153 self-oscillating
half-bridge gate driver IC, and incorporates a high voltage full-
bridge gate driver with a front end oscillator similar to the
industry standard CMOS 555 timer. HVIC and latch immune
CMOS technologies enable ruggedized monolithic construction.
The output driver features a high pulse current buffer stage
designed for minimum driver cross-conduction. Noise immunity
is achieved with low di/dt peak of the gate drivers, and with a
undervoltage lockout hysteresis greater than 1.5V. The
IRS2453D also includes latched and non-latched shutdown pins.
Package
14 Lead PDIP 14 Lead SOIC
IRS2453DPbF (Narrow Body)
IRS2453DSPbF
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2
IRS2453D
PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions.
Parameter
Symbol Definition
Min.
Max.
Units
V
B1,
V
B2
High Side Floating Supply Voltage
-0.3
625
V
V
S1,
V
S2
High Side Floating Supply Offset Voltage
V
B
- 25
V
B
+ 0.3
V
V
HO1
,
V
HO2
High-Side Floating Output Voltage
V
S
- 0.3
V
B
+ 0.3
V
V
LO1
,
V
LO2
Low-Side Output Voltage
-0.3
V
CC
+ 0.3
V
V
RT
R
T
Pin Voltage
-0.3
V
CC
+ 0.3
V
V
CT
C
T
Pin Voltage
-0.3
V
CC
+ 0.3
V
V
SD
SD Pin Voltage
-0.3
V
CC
+ 0.3
V
I
RT
R
T
Pin Current
-5
5
mA
I
CC
Supply Current (Note 1)
---
25
mA
dV
S
/dt
Allowable Offset Voltage Slew Rate
-50
50
V/ns
P
D
Maximum Power Dissipation @ T
A
+25C, 8-Pin DIP
--- 1.0
W
P
D
Maximum Power Dissipation @ T
A
+25C, 8-Pin SOIC
--- 0.625
W
R
JA
Thermal Resistance, Junction to Ambient, 8-Pin DIP
---
125
C/W
R
JA
Thermal Resistance, Junction to Ambient, 8-Pin SOIC
---
200
C/W
T
J
Junction
Temperature
-55
150
T
S
Storage
Temperature
-55
150 C
T
L
Lead Temperature (Soldering, 10 seconds)
---
300
Note 1: This IC contains a zener clamp structure between the chip V
CC
and COM which has a nominal
breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low
impedance power source greater than the V
CLAMP
specified in the Electrical Characteristics section.
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3
IRS2453D
PbF
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Parameter
Symbol Definition Min.
Max.
Units
V
BS1
, V
BS2
High Side Floating Supply Voltage
V
CC
- 0.7
V
CLAMP
V
V
S1
, V
S2
Steady State High Side Floating Supply Offset Voltage
-3.0 (Note 2)
600
V
V
CC
Supply
Voltage
VCCUV+
V
CLAMP
V
I
CC
Supply Current
(Note 3)
5
mA
T
J
Junction
Temperature
-25 125
C
Note 2: Care should be taken to avoid output switching conditions where the V
S
node flies inductively below
ground by more than 5V.
Note 3: Enough current should be supplied to the V
CC
pin of the IC to keep the internal 15.6V zener diode
clamping the voltage at this pin.
Recommended Component Values
Parameter
Symbol Component
Min.
Max.
Units
R
T
Timing Resistor Value
1
---
k
C
T
C
T
Pin Capacitor Value
330
---
pF
VBIAS (V
CC
, V
BS)
= 14V, VS=0V and T
A
= 25C, CLO1=CLO2 = CHO1=CHO2 = 1nF.
IRS2453D Frequency vs. RT
10
100
1000
10000
100000
1000000
1000
10000
100000
1000000
RT (Ohm)
Fr
e
que
nc
y
(
H
z
)
330pf
470pF
1nF
2.2nF
4.7nF
10nF
CT Values
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4
IRS2453D
PbF


Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 14V, C
T
= 1 nF and T
A
= 25C unless otherwise specified. The V
O
and I
O
parameters are referenced to COM and are
applicable to the respective output leads: HO or LO. CLO1=CLO2=CHO1=CHO2=1nF.
Symbol Definition Min
Typ
Max
Units
Test Conditions
Low Voltage Supply Characteristics
V
CCUV+
Rising
V
CC
Undervoltage Lockout Threshold
10.0
11.0
12.0
V
CCUV-
Falling
V
CC
Undervoltage Lockout Threshold
8.0
9.0
10.0
V
V
CCUVHYS
V
CC
Undervoltage Lockout Hysteresis
1.6
2.0
2.4
I
QCCUV
Micropower Startup V
CC
Supply Current
---
140
200
A
V
CC
V
CCUV-
I
QCC
Quiescent VCC Supply Current
---
1.3
2.0
mA
V
CLAMP
V
CC
Zener Clamp Voltage
14.6
15.6
16.6
V
I
CC
= 5mA
Floating Supply Characteristics
I
QBS1UV,
I
QBS2UV
Micropower Startup V
BS
Supply Current
---
3
10
A
V
CC
V
CCUV-
,
V
CC
= V
BS
I
QBS1,
I
QBS2
Quiescent V
BS
Supply Current
---
60
100
A
V
BS1UV+,
V
BS2UV+
V
BS
Supply Undervoltage Positive Going
Threshold
8.0 9.0 10.0 V
V
BS1UV-,
V
BS2UV-,
V
BS
Supply Undervoltage negative Going
Threshold
7.0 8.0 9.0
I
LK1, ILK2
Offset Supply Leakage Current
---
---
50
A
V
B
= V
S
= 600V
Oscillator I/O Characteristics
f
OSC
Oscillator
Frequency
19.6
20.2 20.8 kHz
R
T
= 36.5k
89
95 101
R
T
= 7.15k
d R
T
Pin Duty Cycle
48
50
52
%
f
o
< 100kHz
I
CT
C
T
Pin Current
---
0.05
1.0
A
I
CTUV
UV-Mode
C
T
Pin Pulldown Current
1
5
---
mA
V
CC
= 7V
V
CT+
Upper
C
T
Ramp Voltage Threshold
---
9.1
---
V
CT-
Lower
C
T
Ramp Voltage Threshold
---
4.8
---
V
V
RT+
High-Level
R
T
Output Voltage, V
CC
- V
RT
---
10
50
mV
I
RT
= 100
A
---
100
300
mV
I
RT
= 1mA
V
RT-
Low-Level
R
T
Output Voltage
---
10
50
mV
I
RT
= 100
A
---
100
300
mV
I
RT
= 1mA
V
RTUV
UV-Mode
R
T
Output Voltage
--- 0 100
mV
V
CC
V
CCUV-
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5
IRS2453D
PbF


Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 14V, C
T
= 1 nF and T
A
= 25C unless otherwise specified. The V
O
and I
O
parameters are referenced to COM and are
applicable to the respective output leads: HO or LO. CLO1=CLO2=CHO1=CHO2=1nF.

Symbol Definition Min
Typ
Max
Units
Test Conditions
Gate Driver Output Characteristics
V
OH
High-Level Output Voltage, V
BIAS
- V
O
--- VCC ---
I
O
= 0A
V
OL
Low-Level Output Voltage, V
O
--- COM ---
I
O
= 0A
V
OL_UV
UV-Mode Output Voltage, V
O
--- COM ---
I
O
= 0A,
V
CC
V
CCUV-
t
r
Output Rise Time
---
120
220
t
f
Output Fall Time
---
50
100
t
sd
Shutdown Propagation Delay
---
275
---
nsec
t
d
Output Deadtime (HO or LO)
0.75
1.0
1.50
sec
IO+
Output source current
---
180
---
IO-
Output sink current
---
260
---
mA
Shutdown
V
SD
Shutdown Threshold at SD pin (latched)
--- 2.0 --- V
V
CTSD
C
T
Voltage Shutdown Threshold (non latched)
--- 2.3 --- V
V
RTSD
SD-Mode
R
T
Output Voltage, V
CC
- V
RT
--- 10 50
mV I
RT
= 100
A,
V
CT
= 0V
--- 100 300
mV I
RT
= 1mA,
V
CT
= 0V
Bootstrap FET Characteristics
VB1_ON
VB2_ON
VB when the bootstrap FET is on
---
13.7
---
V
IB1_CAP
IB2_CAP
VB source current when FET is on
30
55
---
CBS=0.1uF
IB1_10V
IB2_10V
VB source current when FET is on
8
12
---
mA
VB=10V