1
LTC1274/LTC1277
12-Bit, 10mW, 100ksps
ADCs with 1
A Shutdown
U
A
O
PPLICATI
TYPICAL
S
FEATURE
D
U
ESCRIPTIO
The LTC
1274/LTC1277 are 8
s sampling 12-bit A/D
converters which draw only 2mA (typ) from single 5V or
5V supplies. These easy-to-use devices come complete
with a 2
s sample-and-hold, a precision reference and an
internally trimmed clock. Unipolar and bipolar conversion
modes add to the flexibility of the ADCs.
Two power-down modes are available in the LTC1277. In
Nap mode, the LTC1277 draws only 180
A and the instant
wake-up from Nap mode allows the LTC1277 to be pow-
ered down even during brief inactive periods. In Sleep
mode only 1
A will be drawn. A REFRDY signal is used to
show the ADC is ready to sample after waking up from
Sleep mode. The LTC1274 also provides the Sleep mode
and REFRDY signal.
The A/D converters convert 0V to 4.096V unipolar inputs
from a single 5V supply or
2.048V bipolar inputs from
5V supplies.
The LTC1274 has a single-ended input and a 12-bit
parallel data format. The LTC1277 offers a differential
input and a 2-byte read format. The bipolar mode is
formatted as 2's complement for the LTC1274 and offset
binary for the LTC1277.
s
Low Power Dissipation: 10mW
s
Sample Rate: 100ksps
s
Samples Inputs Beyond Nyquist, 72dB S/(N + D)
and 82dB THD at f
IN
= 100kHz
s
Single Supply 5V or
5V Operation
s
Power Shutdown to 1
A in Sleep Mode
s
180
A Nap Mode (LTC1277) with Instant Wake-Up
s
Internal Reference Can Be Overdriven
s
Internal Synchronized Clock
s
0V to 4.096V or
2.048V Input Ranges (1mV/LSB)
s
24-Lead SO Package
, LTC and LT are registered trademarks of Linear Technology Corporation.
Supply Current vs Sample Rate with
Sleep and Nap Modes
SAMPLE RATE (Hz)
SUPPLY CURRENT (
A)
10000
1000
100
10
1
0.1
1k
100k
LTC1274/77 TA02
10
1
10k
100
WITHOUT SLEEP OR NAP
NAP = 5V
(SLEEP MODE)
NAP = REFRDY
(SLEEP MODE)
NAP MODE
C
REF
= 4.7
F
U
S
A
O
PPLICATI
s
Battery-Powered Portable Systems
s
High Speed Data Acquisition for PCs
s
Digital Signal Processing
s
Multiplexed Data Acquisition Systems
s
Audio and Telecom Processing
s
Spectrum Analysis
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
A
IN
+
A
IN
V
REF
AGND
REFRDY
SLEEP
NAP
D7
D6
D5
D4
DGND
V
DD
V
SS
BUSY
CS
RD
CONVST
HBEN
V
LOGIC
D0/8
D1/9
D2/10
D3/11
LTC1277
0.1
F
+
10
F
ANALOG
DIFFERENTIAL INPUTS
(0V TO 4.096V)
2.42V
V
REF
OUTPUT
10
F
0.1
F
5V
8-BIT
PARALLEL
BUS
P
CONTROL
LINES
OPTIONAL 3V SUPPLY
TO INTERFACE WITH 3V
PROCESSOR
LTC1274/77 TA01
+
Single 5V Supply, 10mW, 100kHz, 12-Bit ADC
2
LTC1274/LTC1277
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................ 7V
Negative Supply Voltage (V
SS
)
Bipolar Operation Only .......................... 6V to GND
Total Supply Voltage (V
DD
to V
SS
)
Bipolar Operation Only ....................................... 12V
Analog Input Voltage (Note 3)
Unipolar Operation ................... 0.3V to V
DD
+ 0.3V
Bipolar Operation............... V
SS
0.3V to V
DD
+ 0.3V
Digital Input Voltage (Note 4)
Unipolar Operation .............................. 0.3V to 12V
Bipolar Operation.......................... V
SS
0.3V to 12V
A
U
G
W
A
W
U
W
A
R
BSOLUTE
XI
TI
S
W
U
U
PACKAGE/ORDER I FOR ATIO
ORDER
PART NUMBER
LTC1274CS
LTC1274IS
ORDER
PART NUMBER
LTC1277CS
LTC1277IS
Digital Output Voltage
Unipolar Operation ................... 0.3V to V
DD
+ 0.3V
Bipolar Operation...................... 0.3V to V
DD
+ 0.3V
Power Dissipation ............................................. 500mW
Operating Temperature Range
Commercial ............................................ 0
C to 70
C
Industrial ........................................... 40
C to 85
C
Storage Temperature Range ................ 65
C to 150
C
Lead Temperature (Soldering, 10 sec) ................. 300
C
T
JMAX
= 110
C,
JA
= 130
C/W
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
A
IN
V
REF
AGND
D11 (MSB)
D10
D9
D8
D7
D6
D5
D4
DGND
V
DD
V
SS
BUSY
CS
RD
CONVST
SLEEP
REFRDY
D0
D1
D2
D3
SW PACKAGE
24-LEAD PLASTIC SO
T
JMAX
= 110
C,
JA
= 130
C/W
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
24
23
22
21
20
19
18
17
16
15
14
13
A
IN
+
A
IN
V
REF
AGND
REFRDY
SLEEP
NAP
D7
D6
D5
D4
DGND
V
DD
V
SS
BUSY
CS
RD
CONVST
HBEN
V
LOGIC
D0/8
D1/9
D2/10
D3/11
(D11 = MSB)
SW PACKAGE
24-LEAD PLASTIC SO
Consult factory for Military grade parts.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution (No Missing Codes)
q
12
Bits
Integral Linearity Error
(Note 7)
q
1
LSB
Differential Linearity Error
q
1
LSB
Unipolar Offset Error
6
LSB
q
8
LSB
Bipolar Offset Error
(Note 8)
8
LSB
q
10
LSB
Gain Error
20
LSB
Gain Error Tempco
I
OUT(REF)
= 0
q
10
45
ppm/
C
C
C
HARA TERISTICS
CO
U
VERTER
With Internal Reference (Notes 5, 6)
3
LTC1274/LTC1277
(Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
IN
Analog Input Range (Note 10)
4.75V
V
DD
5.25V (Unipolar)
q
0 to 4.096
V
4.75V
V
DD
5.25V, 5.25V
V
SS
2.45V (Bipolar)
q
2.048
V
I
IN
Analog Input Leakage Current
CS = High
q
1
A
C
IN
Analog Input Capacitance
Between Conversions (Sample Mode)
45
pF
During Conversions (Hold Mode)
5
pF
PUT
U
I
A
A
U
LOG
ACCURACY
IC
DY
U
W
A
(Notes 5, 9)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
S/(N + D) Signal-to-Noise
50kHz Input Signal
73
dB
Plus Distortion Ratio
100kHz Input Signal
q
70
72.5
dB
THD
Total Harmonic Distortion
50kHz Input Signal
84
dB
Up to 5th Harmonic
100kHz Input Signal
q
82
76
dB
Peak Harmonic or
50kHz Input Signal
84
dB
Spurious Noise
100kHz Input Signal
q
82
76
dB
IMD
Intermodulation Distortion
fa = 96.95kHz, fb = 97.68kHz
2nd Order Terms
78
dB
3rd Order Terms
81
dB
Full Power Bandwidth
2
MHz
Full Linear Bandwidth
350
kHz
[S/(N + D)
68dB]
I TER AL REFERE CE CHARACTERISTICS
U
U
U
(Note 5)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
REF
Output Voltage
I
OUT
= 0
2.400
2.420
2.440
V
V
REF
Output Tempco
I
OUT
= 0
q
10
45
ppm/
C
V
REF
Line Regulation
4.75V
V
DD
5.25V
0.01
LSB/V
5.25V
V
SS
4.75V
0.01
LSB/V
V
REF
Load Regulation
5mA
I
OUT
70
A
2
LSB/mA
(Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
IH
High Level Input Voltage
V
DD
= 5.25V
q
2.4
V
V
IL
Low Level Input Voltage
V
DD
= 4.75V
q
0.8
V
I
IN
Digital Input Current
V
IN
= 0V to V
DD
q
10
A
C
IN
Digital Input Capacitance
5
pF
V
OH
High Level Output Voltage, All Logic Outputs
V
DD
= 4.75V
I
O
= 10
A
4.70
V
I
O
= 200
A
q
4.0
V
V
LOGIC
= 2.7V (LTC1277)
I
O
= 10
A
2.65
V
I
O
= 200
A
2.60
V
V
OL
Low Level Output Voltage,
V
DD
= 4.75V
All Logic Outputs
I
O
= 160
A
0.05
V
I
O
= 1.6mA
q
0.10
0.4
V
V
LOGIC
=2.7V (LTC1277)
I
O
= 160
A
0.05
V
I
O
= 1.6mA
0.10
V
DIGITAL I PUTS A D DIGITAL OUTPUTS
U
U
4
LTC1274/LTC1277
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
OZ
High-Z Output Leakage D11 to D0/8
V
OUT
= 0V to V
DD
, CS High
q
10
A
C
OZ
High-Z Output Capacitance D11 to D0/8
CS High (Note 10)
q
15
pF
I
SOURCE
Output Source Current
V
OUT
= 0V
10
mA
I
SINK
Output Sink Current
V
OUT
= V
DD
10
mA
(Note 5)
DIGITAL I PUTS A D DIGITAL OUTPUTS
U
U
(Note 5)
POWER REQUIRE E TS
W U
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
DD
Positive Supply Voltage (Notes 11, 12)
Unipolar and Bipolar Mode
4.75
5.25
V
V
LOGIC
Logic Supply (Notes 11,12)
Unipolar and Bipolar Mode (LTC1277)
2.7 to 5.25
V
V
SS
Negative Supply Voltage (Note 11)
Bipolar Mode Only
2.45
5.25
V
I
DD
Positive Supply Current
f
SAMPLE
= 100ksps
q
2
4
mA
NAP = 0V (LTC1277 Only)
q
180
320
A
SLEEP = 0V
q
0.3
5
A
I
SS
Negative Supply Current
f
SAMPLE
= 100ksps, Bipolar Mode Only
q
40
70
A
SLEEP = 0V
q
0.3
5
A
P
DISS
Power Dissipation
f
SAMPLE
= 100ksps
q
10
20
mW
NAP = 0V (LTC1277 Only)
q
0.9
1.8
mW
SLEEP = 0V (Unipolar/Bipolar)
q
25/50
W
(Note 5) See Figures 13 to 17.
TI I G CHARACTERISTICS
W U
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f
SAMPLE(MAX)
Maximum Sampling Frequency
(Note 11)
q
100
ksps
t
CONV
Conversion Time
q
6
8
s
t
ACQ
Acquisition Time
q
0.35
2
s
t
1
CS
to RD
Setup Time
(Note 10)
q
0
ns
t
2
CS
to CONVST
Setup Time
(Note 10)
q
30
ns
t
3
NAP
to CONVST
Wake-Up Time
(LTC1277 Only) (Note 11)
620
ns
t
4
CONVST
Low Time
(Note 13)
q
40
ns
t
5
CONVST
to BUSY
Delay
C
L
= 100pF
q
70
150
ns
t
6
Data Ready Before BUSY
C
L
= 100pF
q
20
65
ns
t
7
Delay Between Conversions
(Note 11)
q
0.35
2
s
t
8
Wait Time RD
After BUSY
(Note 10)
q
20
ns
t
9
Data Access Time After RD
C
L
= 20pF (Note 10)
50
110
ns
q
140
ns
C
L
= 100pF
65
125
ns
q
170
ns
t
10
Bus Relinquish Time
C
L
= 100pF
20
60
90
ns
q
20
100
ns
t
11
RD Low Time
(Note 10)
q
t
9
ns
t
12
CONVST High Time
(Notes 10, 13)
q
40
ns
t
13
Aperture Delay of Sample-and-Hold
35
ns
t
14
SLEEP
to REFRDY
Wake-Up Time 10
F Bypass at V
REF
Pin
4.2
ms
4.7
F Bypass at V
REF
Pin
3.3
ms
t
15
HBEN
to High Byte Data Valid
C
L
= 100pF (LTC1277 Only)
q
35
100
ns
5
LTC1274/LTC1277
(Note 5) See Figures 13 to 17.
TI I G CHARACTERISTICS
W U
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
t
16
HBEN
to Low Byte Data Valid
C
L
= 100pF (LTC1277 Only)
q
45
100
ns
t
17
HBEN
to RD
Setup Time
(Note 10) (LTC1277 Only)
q
10
ns
t
18
RD
to HBEN
Setup Time
(Note 10) (LTC1277 Only)
q
10
ns
The
q
denotes specifications which apply over the full operating
temperature range; all other limits and typicals T
A
= 25
C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND and
AGND wired together and V
LOGIC
is tied to V
DD
in LTC1277 (unless
otherwise noted).
Note 3: When these pin voltages are taken below V
SS
(ground for unipolar
mode) or above V
DD
, they will be clamped by internal diodes. This product
can handle input currents greater than 60mA below V
SS
(ground for
unipolar mode) or above V
DD
without latch-up.
Note 4: When these pin voltages are taken below V
SS
(ground for unipolar
mode), they will be clamped by internal diodes. This product can handle
input currents greater than 60mA below V
SS
(ground for unipolar mode)
without latch-up. These pins are not clamped to V
DD
.
Note 5: V
DD
= 5V (V
SS
= 5V for bipolar mode), V
LOGIC
= V
DD
(LTC1277),
f
SAMPLE
= 100ksps, t
r
= t
f
= 5ns unless otherwise specified.
Note 6: Linearity, offset and full-scale specifications apply for unipolar and
bipolar modes.
Note 7: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 8: For LTC1274, bipolar offset is the offset voltage measured from
0.5LSB when the output code flickers between 0000 0000 0000 and
1111 1111 1111. For LTC1277, bipolar offset voltage is measured from
0.5LSB when the output code flickers between 0111 1111 1111 and
1000 0000 0000.
Note 9: The AC tests apply to bipolar mode only and the S/(N + D) is 71dB
(typ) for unipolar mode at 100kHz input frequency.
Note 10: Guaranteed by design, not subject to test.
Note 11: Recommended operating conditions.
Note 12: A
IN
must not exceed V
DD
or fall below V
SS
by more than 50mV to
specified accuracy.
Note 13: The falling CONVST edge starts a conversion. If CONVST returns
high at a bit decision point during the conversion it can create small
errors. For best performance ensure that CONVST returns high either
within 400ns after conversion start (i.e., before the first bit decision) or
after BUSY rises (i.e., after the last bit test). See timing diagrams Modes
1a and 1b (Figures 13, 14).
TYPICAL PERFOR
M
A
N
CE CHARACTERISTICS
U
W
Integral Nonlinearity vs
Output Code
OUTPUT CODE
0
1.00
INTEGRAL NONLINEARITY ERROR (LSB)
0.50
0
0.50
1.00
512 1024 1536 2048
LT1274/77 TPC01
2560 3072 3584 4096
f
SAMPLE
= 100kHz
INPUT FREQUENCY (Hz)
10k
EFFECTIVE NUMBER OF BITS (ENOBs)
12
11
10
9
8
7
6
5
4
3
2
1
0
S/(N + D)(dB)
74
68
62
56
50
100k
1M
2M
LTC1274/77 TPC03
f
SAMPLE
= 100kHz
NYQUIST
FREQUENCY
OUTPUT CODE
0
1.00
DIFFERENTIAL NONLINEARITY ERROR (LSB)
0.50
0
0.50
1.00
512 1024 1536 2048
LT1274/77 TPC02
2560 3072 3584 4096
f
SAMPLE
= 100kHz
Differential Nonlinearity vs
Output Code
ENOBs and S/(N + D) vs
Input Frequency
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