1
LTC1290
Single Chip 12-Bit Data
Acquisition System
12-Bit 8-Channel Sampling Data Acquisition System
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
V
CC
ACLK
SCLK
D
IN
D
OUT
CS
REF
+
REF
V
AGND
LTC1290
DIFFERENTIAL INPUT (+)
5V COMMON MODE RANGE ()
1k
SINGLE-ENDED INPUT
0V TO 5V OR
5V
15V OVERVOLTAGE RANGE*
TO AND FROM
MICROPROCESSOR
0.1
F
1N5817
5V
22
F
TANTALUM
1N5817
1N4148
4.7
F
TANTALUM
1
F
LT
1027
5V
8V TO 40V
* FOR OVERVOLTAGE PROTECTION ON ONLY ONE CHANNEL LIMIT THE INPUT CURRENT TO 15mA. FOR OVERVOLTAGE PROTECTION
ON MORE THAN ONE CHANNEL LIMIT THE INPUT CURRENT TO 7mA PER CHANNEL AND 28mA FOR ALL CHANNELS. (SEE SECTION ON
OVERVOLTAGE PROTECTION IN THE APPLICATIONS INFORMATION SECTION.) CONVERSION RESULTS ARE NOT VALID WHEN THE SELECTED
OR ANY OTHER CHANNEL IS OVERVOLTAGED (V
IN
< V
OR V
IN
> V
CC
).
1290 TA01
+
+
S
FEATURE
D
U
ESCRIPTIO
The LTC
1290 is a data acquisition component which
contains a serial I/O successive approximation A/D con-
verter. It uses LTCMOS
TM
switched capacitor technology
to perform either 12-bit unipolar or 11-bit plus sign bipolar
A/D conversions. The 8-channel input multiplexer can be
configured for either single-ended or differential inputs (or
combinations thereof). An on-chip sample-and-hold is
included for all single-ended input channels. When the
LTC1290 is idle it can be powered down with a serial word
in applications where low power consumption is desired.
The serial I/O is designed to be compatible with industry
standard full duplex serial interfaces. It allows either MSB-
or LSB-first data and automatically provides 2's comple-
ment output coding in the bipolar mode. The output data
word can be programmed for a length of 8, 12 or 16 bits.
This allows easy interface to shift registers and a variety of
processors.
LTCMOS is a trademark of Linear Technology Corporation.
KEY SPECIFICATIO S
U
s
Software Programmable Features
Unipolar/Bipolar Conversion
Four Differential/Eight Single-Ended Inputs
MSB- or LSB-First Data Sequence
Variable Data Word Length
Power Shutdown
s
Built-In Sample-and-Hold
s
Single Supply 5V or
5V Operation
s
Direct Four-Wire Interface to Most MPU Serial Ports
and All MPU Parallel Ports
s
50kHz Maximum Throughput Rate
s
Resolution: 12 Bits
s
Fast Conversion Time: 13
s Max Over Temp
s
Low Supply Current: 6.0mA
U
A
O
PPLICATI
TYPICAL
, LTC and LT are registered trademarks of Linear Technology Corporation.
2
LTC1290
LTC1290B
LTC1290C
LTC1290D
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Offset Error
(Note 4)
q
1.5
1.5
1.5
LSB
Linearity Error (INL)
(Notes 4,5)
q
0.5
0.5
0.75
LSB
Gain Error
(Note 4)
q
0.5
1.0
4.0
LSB
Minimum Resolution for Which
q
12
12
12
Bits
No Missing Codes are Guaranteed
Analog and REF Input Range
(Note 7)
(V
) 0.05V to V
CC
+ 0.05V (V
) 0.05V to V
CC
+ 0.05V (V
) 0.05V to V
CC
+ 0.05V
V
On Channel Leakage Current
On Channel = 5V
q
1
1
1
A
(Note 8)
Off Channel = 0V
On Channel = 0V
q
1
1
1
A
Off Channel = 5V
Off Channel Leakage Current
On Channel = 5V
q
1
1
1
A
(Note 8)
Off Channel = 0V
On Channel = 0V
q
1
1
1
A
Off Channel = 5V
A
U
G
W
A
W
U
W
A
R
BSOLUTE
XI
TI
S
Supply Voltage (V
CC
) to GND or V
........................ 12V
Negative Supply Voltage (V
) .................... 6V to GND
Voltage
Analog/Reference Inputs ......... (V
) 0.3V to V
CC
+ 0.3V
Digital Inputs ........................................ 0.3V to 12V
Digital Outputs ........................... 0.3V to V
CC
+ 0.3V
Power Dissipation ............................................. 500mW
(Notes 1, 2)
Operating Temperature Range
LTC1290BC, LTC1290CC, LTC1290DC .... 0
C to 70
C
LTC1290BI, LTC1290CI, LTC1290DI .... 40
C to 85
C
LTC1290BM, LTC1290CM,
LTC1290DM....................................... 55
C to 125
C
Storage Temperature Range ................ 65
C to 150
C
Lead Temperature (Soldering, 10 sec.)................ 300
C
W
U
U
PACKAGE/ORDER I FOR ATIO
LTC1290BCSW
LTC1290CCSW
LTC1290DCSW
LTC1290BISW
LTC1290CISW
LTC1290DISW
CO VERTER A D ULTIPLEXER CHARACTERISTICS
U
U W
(Note 3)
1
2
3
4
5
6
7
8
9
10
TOP VIEW
J PACKAGE
20-LEAD CERAMIC DIP
N PACKAGE
20-LEAD PDIP
20
19
18
17
16
15
14
13
12
11
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
V
CC
ACLK
SCLK
D
IN
D
OUT
CS
REF
+
REF
V
AGND
T
JMAX
= 150
C,
JA
= 80
C/W (J)
T
JMAX
= 110
C,
JA
= 100
C/W (N)
T
JMAX
= 110
C,
JA
= 130
C/W (SW)
ORDER PART
NUMBER
ORDER PART
NUMBER
LTC1290BMJ
LTC1290CMJ
LTC1290DMJ
LTC1290BIJ
LTC1290CIJ
LTC1290DIJ
LTC1290BIN
LTC1290CIN
LTC1290DIN
LTC1290BCN
LTC1290CCN
LTC1290DCN
1
2
3
4
5
6
7
8
9
10
TOP VIEW
SW PACKAGE
20-LEAD PLASTIC SO WIDE
20
19
18
17
16
15
14
13
12
11
CH0
CH1
CH2
CH3
CH4
CH5
CH6
CH7
COM
DGND
V
CC
ACLK
SCLK
D
IN
D
OUT
CS
REF
+
REF
V
AGND
3
LTC1290
LTC1290B/LTC1290C/LTC1290D
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
f
SCLK
Shift Clock Frequency
V
CC
= 5V (Note 6)
0
2.0
MHz
f
ACLK
A/D Clock Frequency
V
CC
= 5V (Note 6)
(Note 10)
4.0
MHz
t
ACC
Delay time from CS
to D
OUT
Data Valid
(Note 9)
2
ACLK
Cycles
t
SMPL
Analog Input Sample Time
See Operating Sequence
7
SCLK
Cycles
t
CONV
Conversion Time
See Operating Sequence
52
ACLK
Cycles
t
CYC
Total Cycle Time
See Operating Sequence (Note 6)
12 SCLK +
Cycles
56 ACLK
t
dDO
Delay Time, SCLK
to D
OUT
Data Valid
See Test Circuits LTC1290BC, LTC1290CC
q
130
220
ns
LTC1290DC, LTC1290BI
LTC1290CI, LTC1290DI
LTC1290BM, LTC1290CM
q
180
270
ns
LTC1290DM
t
dis
Delay Time, CS
to D
OUT
Hi-Z
See Test Circuits
q
70
100
ns
t
en
Delay Time, 2nd ACLK
to D
OUT
Enabled
See Test Circuits
q
130
200
ns
t
hCS
Hold Time, CS After Last SCLK
V
CC
= 5V (Note 6)
0
ns
t
hDI
Hold Time, D
IN
After SCLK
V
CC
= 5V (Note 6)
50
ns
t
hDO
Time Output Data Remains Valid After SCLK
50
ns
t
f
D
OUT
Fall Time
See Test Circuits
q
65
130
ns
t
r
D
OUT
Rise Time
See Test Circuits
q
25
50
ns
t
suDI
Setup Time, D
IN
Stable Before SCLK
V
CC
= 5V (Note 6)
50
ns
t
suCS
Setup Time, CS
Before Clocking in
(Notes 6, 9)
2 ACLK Cycles
First Address Bit
+ 100ns
t
WHCS
CS High Time During Conversion
V
CC
= 5V (Note 6)
52
ACLK
Cycles
C
IN
Input Capacitance
Analog Inputs On Channel
100
pF
Analog Inputs Off Channel
5
pF
Digital Inputs
5
pF
(Note 3)
AC CHARACTERISTICS
ELECTRICAL C
C
HARA TER STICS
DIGITAL A D
U
I
DC
(Note 3)
LTC1290B/LTC1290C/LTC1290D
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
IH
High Level Input Voltage
V
CC
= 5.25V
q
2.0
V
V
IL
Low Level Input Voltage
V
CC
= 4.75V
q
0.8
V
I
IH
High Level Input Current
V
IN
= V
CC
q
2.5
A
I
IL
Low Level Input Current
V
IN
= 0V
q
2.5
A
V
OH
High Level Output Voltage
V
CC
= 4.75V I
O
= 10
A
4.7
V
I
O
= 360
A
q
2.4
4.0
V
V
OL
Low Level Output Voltage
V
CC
= 4.75V I
O
= 1.6mA
q
0.4
V
I
OZ
High-Z Output Leakage
V
OUT
= V
CC
, CS High
q
3
A
V
OUT
= 0V, CS High
q
3
A
I
SOURCE
Output Source Current
V
OUT
= 0V
20
mA
4
LTC1290
LTC1290B/LTC1290C/LTC1290D
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
SINK
Output Sink Current
V
OUT
= V
CC
20
mA
I
CC
Positive Supply Current
CS High
q
6
12
mA
CS High
LTC1290BC, LTC1290CC
q
5
10
A
Power Shutdown LTC1290DC, LTC1290BI
ACLK Off
LTC1290CI, LTC1290DI
LTC1290BM, LTC1290CM
q
5
15
A
LTC1290DM
I
REF
Reference Current
V
REF
= 5V
q
10
50
A
I
Negative Supply Current
CS High
q
1
50
A
ELECTRICAL C
C
HARA TER STICS
DIGITAL A D
U
I
DC
(Note 3)
below V
or one diode drop above V
CC
. Be careful during testing at low
V
CC
levels (4.5V), as high level reference or analog inputs (5V) can cause
this input diode to conduct, especially at elevated temperatures and cause
errors for inputs near full scale. This spec allows 50mV forward bias of
either diode. This means that as long as the reference or analog input does
not exceed the supply voltage by more than 50mV, the output code will be
correct. To achieve an absolute 0V to 5V input voltage range will therefore
require a minimum supply voltage of 4.950V over initial tolerance,
temperature variations and loading.
Note 8: Channel leakage current is measured after the channel selection.
Note 9: To minimize errors caused by noise at the chip select input, the
internal circuitry waits for two ACLK falling edge after a chip select falling
edge is detected before responding to control input signals. Therefore, no
attempt should be made to clock an address in or data out until the
minimum chip select setup time has elapsed.
Note 10: Increased leakage currents at elevated temperatures cause the
S/H to droop, therefore it's recommended that f
ACLK
500kHz at 125
C,
f
ACLK
125kHz at 85
C and f
ACLK
15kHz at 25
C.
The
q
denotes specifications which apply over the full operating
temperature range; all other limits and typicals T
A
= 25
C.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All voltage values are with respect to ground with DGND, AGND
and REF
wired together (unless otherwise noted).
Note 3: V
CC
= 5V, V
REF +
= 5V, V
REF
= 0V, V
= 0V for unipolar mode and
5V for bipolar mode, ACLK = 4.0MHz unless otherwise speicfied.
Note 4: These specs apply for both unipolar and bipolar modes. In bipolar
mode, one LSB is equal to the bipolar input span (2V
REF
) divided by 4096.
For example, when V
REF
= 5V, 1LSB (bipolar) = 2(5V)/4096 = 2.44mV.
Note 5: Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6: Recommended operating conditions.
Note 7: Two on-chip diodes are tied to each reference and analog input
which will conduct for reference or analog input voltages one diode drop
C
C
HARA TERISTICS
U
W
A
TYPICAL PERFOR
CE
Supply Current vs Temperature
Supply Current vs Supply Voltage
Unadjusted Offset Voltage vs
Reference Voltage
SUPPLY VOLTAGE, V
CC
(V)
4
6
8
10
SUPPLY CURRENT, I
CC
(mA)
1290 TPC01
26
22
18
14
10
6
2
ACLK = 4MHz
T
A
= 25
C
AMBIENT TEMPERATURE, T
A
(
C)
50
SUPPLY CURRENT, I
CC
(mA)
30
10
9
8
7
6
5
4
3
LT1290 TPC02
10
70
30
50
10
90 110 130
ACLK = 4MHz
V
CC
= 5V
REFERENCE VOLTAGE, V
REF
(V)
1
OFFSET ERROR (LSB = V
REF
)
5
1290 TPC03
2
3
4
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
1
4096
V
OS
= 0.25mV
V
OS
= 0.125mV
V
CC
= 5V
5
LTC1290
C
C
HARA TERISTICS
U
W
A
TYPICAL PERFOR
CE
Change in Offset vs Temperature
Change in Linearity vs Reference
Voltage
REFERENCE VOLTAGE, V
REF
(V)
0
LINEARITY ERROR (LSB = V
REF
)
1.25
1.00
0.75
0.50
0.25
0
4
1290 TPC04
1
2
3
5
1
4096
V
CC
= 5V
Change in Gain vs Reference
Voltage
REFERENCE VOLTAGE, V
REF
(V)
1
CHANGE IN GAIN ERROR (LSB = V
REF
)
0.2
0.1
0
5
1290 TPC05
0.3
0.4
0.5
2
3
4
1
4096
V
CC
= 5V
AMBIENT TEMPERATURE, T
A
(
C)
50
MAGNITUDE OF OFFSET CHANGE
OFFSET
(LSB)
0.5
0.4
0.3
0.2
0.1
0
10
30
50
130
1290 TPC06
30
10
70
90 110
ACLK = 4MHz
V
CC
= 5V
V
REF
= 5V
Change in Gain Error vs
Temperature
AMBIENT TEMPERATURE, T
A
(
C)
50
MAGNITUDE OF GAIN CHANGE
GAIN
(LSB)
0.5
0.4
0.3
0.2
0.1
0
10
30
50
130
1290 TPC08
30
10
70
90 110
ACLK = 4MHz
V
CC
= 5V
V
REF
= 5V
Change in Linearity Error vs
Temperature
AMBIENT TEMPERATURE, T
A
(
C)
50
0
MAGNITUDE OF LINEARITY CHANGE
LINEARITY
(LSB)
0.1
0.3
0.4
0.5
10
30
50
130
1290 TPC07
0.2
30
10
70
90 110
0.6
ACLK = 4MHz
V
CC
= 5V
V
REF
= 5V
Maximum Filter Resistor vs
Cycle Time
Maximum ACLK Frequency vs
Source Resistance
R
SOURCE
(
)
100
0
MAXIMUM ACLK FREQUENCY* (MHz)
4
5
1k
10 k
100k
1290 TPC09
3
2
1
V
CC
= 5V
V
REF
= 5V
T
A
= 25
C
+
INPUT
INPUT
V
IN
R
SOURCE
* MAXIMUM ACLK FREQUENCY REPRESENTS THE ACLK
FREQUENCY AT WHICH A 0.1LSB SHIFT IN THE ERROR AT
ANY CODE TRANSITION FROM ITS 4MHz VALUE IS FIRST DETECTED.
CYCLE TIME, t
CYC
(
s)
MAXIMUM R
FILTER
** (
)
10
100
1k
10k
10
1000
10000
1290 TPC10
1.0
100
+
V
IN
C
FILTER
1
F
R
FILTER
** MAXIMUM R
FILTER
REPRESENTS THE FILTER RESISTOR VALUE
AT WHICH A 0.1LSB CHANGE IN FULL-SCALE ERROR FROM
ITS VALUE AT R
FILTER
= 0 IS FIRST DETECTED.
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