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Электронный компонент: BDMR4102

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Order Number C14064
TinyRISC
BDMR4102
Evaluation Board
User's Guide
January 2000
ii
Document DB15-000096-01, Second Edition (January 2000). This document
describes revision B of LSI Logic Corporation's TinyRISC
BDMR4102
Evaluation Board User's Guide and will remain the official reference source for
all revisions/releases of this product until rescinded by an update.
To receive product literature, visit us at http://www.lsilogic.com.
LSI Logic Corporation reserves the right to make changes to any products
described herein at any time without notice. LSI Logic does not assume any
responsibility or liability arising out of the application or use of any product
described herein, except as expressly agreed to in writing by LSI Logic; nor does
the purchase or use of a product from LSI Logic convey a license under any
patent rights, copyrights, trademark rights, or any other of the intellectual
property rights of LSI Logic or third parties.
Copyright 19982000 by LSI Logic Corporation. All rights reserved.
TRADEMARK ACKNOWLEDGMENT
LSI Logic logo design, TinyRISC, and MiniRISC are registered trademarks and
SerialICE is a trademark of LSI Logic Corporation. All other brand and product
names may be trademarks of their respective companies.
Contents
iii
Contents
Preface
Chapter 1
Introduction
1.1
Product Summary
1-1
1.2
Product Features
1-2
1.3
Debug Environment Overview
1-3
1.4
Block Diagram
1-4
Chapter 2
Installation Procedures
2.1
Quick Check
2-1
2.1.1
Checking the Board
2-2
2.1.2
Resolving Problems
2-4
2.2
Jumper Settings
2-5
2.2.1
Select PLLN (JP1)
2-9
2.2.2
Divide C1 (JP2) and Divide C0 (JP3)
2-9
2.2.3
Divide A1 (JP4) and Divide A0 (JP5)
2-10
2.2.4
Endian Selection (JP6)
2-11
2.2.5
Probe Enable (JP7)
2-11
2.2.6
Alternate Boot Program Selection (JP8)
2-11
2.2.7
Boot Device Selection (JP9)
2-11
2.2.8
Connect 3.3 V Power (JP10)
2-12
2.2.9
Connect CPU I/O Ring Power (JP11)
2-12
2.2.10
Connect V
DD
Core Power (JP12)
2-12
2.2.11
V
DD
Core Voltage Selection (JP13)
2-13
2.2.12
Clock Source Selection (JP14)
2-13
2.2.13
SerialICE-1 Input Data Selection (JP15)
2-13
2.2.14
SerialICE-1 Clock Selection (JP16)
2-13
2.2.15
EDO/SDRAM Selection (JP17)
2-14
iv
Contents
Chapter 3
Board Design and Layout
3.1
Board Layout
3-2
3.2
External Interfaces
3-3
3.2.1
Expansion Connector (J2)
3-4
3.2.2
DIMM Connector (J3)
3-7
3.2.3
Serial Port Connector (J10)
3-9
3.2.4
RS-232 Serial Connector for SerialICE-1 (J9)
3-10
3.2.5
SerialICE-1 Connector (J8)
3-11
3.2.6
Ethernet Connector (J7)
3-12
3.2.7
EJTAG Connectors
3-13
3.2.8
PAL Programming Connector (J11)
3-18
3.2.9
Power Supply Connector (J1)
3-19
3.3
Indicators
3-20
3.3.1
Power LED
3-20
3.3.2
Ethernet LEDs
3-21
3.3.3
Debug LED
3-21
3.3.4
7-Segment Display
3-22
3.4
System Memory
3-23
3.4.1
Synchronous DRAM Dual Inline Memory
Module (SDRAM DIMM)
3-23
3.4.2
Static RAM (SRAM)
3-23
3.4.3
Boot EPROMs
3-23
3.5
Memory Map
3-24
3.6
Two-Wire Serial Bus Peripheral Devices
3-26
3.6.1
Real-Time Clock (RTC)
3-26
3.6.2
EEPROM
3-28
3.6.3
Serial Presence Detect (SPD)
3-28
3.6.4
LR4102 Interrupts
3-29
3.7
Device Registers
3-29
3.7.1
PC16550D UART Registers
3-30
3.7.2
Am79C970A Ethernet Controller
3-31
Chapter 4
PAL Equations
Chapter 5
Schematics
5.1
Microprocessor and Clock Circuitry
5-2
5.2
ROMs, SRAMs, and Address Latches
5-4
5.3
Ethernet and DRAM Circuitry
5-6
Contents
v
5.4
Miscellaneous Circuitry and Connectors
5-8
5.5
Expansion Connector and Boot Device Selection Circuitry
5-10
5.6
Power and Reset Circuitry
5-12
5.7
EJTAG Connectors
5-14
Chapter 6
Bill of Materials
Customer Feedback
Figures
1.1
BDMR4102 Block Diagram
1-4
2.1
View of the BDMR4102 Quick Check Components
2-2
2.2
Jumper Positions
2-5
2.3
Jumper Locations on the BDMR4102 Evaluation Board
2-6
3.1
BDMR4102 Evaluation Board Layout
3-2
3.2
Expansion Connector
3-5
3.3
DIMM Connector Pin Numbers
3-7
3.4
Serial Port Connector
3-9
3.5
RS-232 SerialICE-1 Connector
3-10
3.6
SerialICE-1 Connector
3-11
3.7
Ethernet 10BASE-T Connector
3-12
3.8
EJTAG Connector J4
3-14
3.9
EJTAG Connector J5
3-15
3.10
PAL Programming Connector
3-18
3.11
Power Supply Connector
3-19
3.12
Indicator Positions
3-20
3.13
Ethernet Indicator Positions
3-21
3.14
7-Segment Display
3-22
5.1
Microprocessor and Clock Circuitry
5-3
5.2
ROMs, SRAMs, and Address Latches
5-5
5.3
Ethernet and DRAM Circuitry
5-7
5.4
Miscellaneous Circuitry and Connectors
5-9
5.5
Expansion Connector and Boot Device Selection Circuitry
5-11
5.6
Power and Reset Circuitry
5-13
5.7
EJTAG Connectors
5-15