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Электронный компонент: MAX6900

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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
General Description
The MAX6900, I
2
CTM-bus-compatible real-time clock
(RTC) in a 6-pin TDFN package contains a real-time
clock/calendar and 31-byte
8-bit wide of static ran-
dom access memory (SRAM). The real-time clock/cal-
endar provides seconds, minutes, hours, day, date,
month, and year information. The end of the month date
is automatically adjusted for months with fewer than 31
days, including corrections for leap year up to the year
2100. The clock operates in either the 24hr or 12hr for-
mat with an AM/PM indicator.
Applications
Portable Instruments
Point-of-Sale Equipment
Intelligent Instruments
Battery-Powered Products
Features
o Real-Time Clock Counts Seconds, Minutes,
Hours, Date, Month, Day, and Year
o Leap Year Compensation Valid up to Year 2100
o Fast (400kHz) I
2
C-Bus-Compatible Interface from
2.0V to 5.5V
o 31
8 SRAM for Scratchpad Data Storage
o Uses Standard 32.768kHz, 12.5pF Load, Watch
Crystal
o Ultra-Low 225nA (typ) Timekeeping Current
o Single-Byte or Multiple-Byte (Burst Mode) Data
Transfer for Read or Write of Clock Registers or
SRAM
o 6-Pin 3mm x 3mm x 0.8mm TDFN Surface-Mount
Package
o No External Crystal Bias Resistors or Capacitors
Required
MAX6900
I
2
C-Compatible RTC in a TDFN
________________________________________________________________ Maxim Integrated Products
1
C
RPU
RPU
0.01
F
CRYSTAL
X1
SCL
SDA
5
2
3
4
1
6
X2
GND
RPU = t
r
/C
bus
V
CC
V
CC
V
CC
V
CC
MAX6900
19-1942; Rev 3; 6/03
Typical Operating Circuit
X1
GND
X2
1
6
SDA
5
SCL
V
CC
MAX6900
TDFN
TOP VIEW
2
3
4
Pin Configuration
Ordering Information
PART
TEMP RANGE
PIN-
PACKAGE
TOP
MARK
MAX6900ETT-T
-40
C to +85C
6 TDFN
AEU
Related Real-Time Clock Products
PART
SERIAL BUS
SRAM
ALARM
FUNCTION
OUTPUT
FREQUENCY
PIN-PACKAGE
MAX6900
I
2
C compatible
31
8
--
--
6 TDFN
MAX6901
3-wire
31
8
Polled
32kHz
8 TDFN
MAX6902
SPITM compatible
31
8
Polled
--
8 TDFN
I
2
C is a trademark of Philips Corp. Purchase of I
2
C components
of Maxim Integrated Products, Inc., or one of its sublicensed
Associated Companies, conveys a license under the Philips I
2
C
Patent Rights to use these components in an I
2
C system, provid-
ed that the system conforms to the I
2
C Standard Specification
as defined by Philips.
SPI is a trademark of Motorola, Inc.
MAX6900
I
2
C-Compatible RTC in a TDFN
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC
to GND ..............................................................-0.3V to +6V
All Other Pins to GND ................................-0.3V to (V
CC
+ 0.3V)
Input Current
All Pins ............................................................................20mA
Output Current
All Outputs .......................................................................20mA
Rate of Rise, V
CC
............................................................100V/s
Continuous Power Dissipation (T
A
= +70C)
6-Pin TDFN (derate 24.4mW/C above +70C) .......1951.0mW
Operating Temperature Range ...............................T
MIN
to T
MAX
MAX6900 ETT-T .......................T
MIN
= -40C, T
MAX
= +85C
Junction Temperature .....................................................+150C
Storage Temperature Range ............................ -65C to +150C
ESD Protection (all pins, Human Body model) ..................2000V
Lead Temperature (soldering, 10s) ............................+300C
DC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.0V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25C.) (Note 1)
AC ELECTRICAL CHARACTERISTICS
(V
CC
= +2.0V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25C.) (Notes 1, 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Operating Voltage Range
V
CC
2
5.5
V
V
CC
= +2.0V
30
Active Supply Current (Note 2)
I
CC
V
CC
= +5.0V
110
A
V
CC
= +2.0V
0.225
0.630
Timekeeping Supply Current
(Note 3)
I
TK
V
CC
= +5.0V
1.2
1.7
A
2-WIRE DIGITAL INPUTS SCL, SDA
Input High Voltage
V
IH
0.7 x V
CC
V
Input Low Voltage
V
IL
0.3 x
V
CC
V
Input Hysteresis (Note 5)
V
HYS
0.05
x
V
CC
V
Input Leakage Current (Note 4)
0 < V
IN
< V
CC
-10
10
nA
Input Capacitance (Note 5)
10
pF
2-WIRE DIGITAL OUTPUT SDA
Output Low Voltage
V
OL
I
SINK
= 4mA
0.4
V
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OSCILLATOR
X1 to Ground Capacitance
25
pF
X2 to Ground Capacitance
25
pF
FAST I
2
C-BUS-COMPATIBLE TIMING
SCL Clock Frequency
f
SCL
0
400
kHz
Bus Free Time Between STOP
and START Condition (Note 4)
t
BUF
1.3
s
MAX6900
I
2
C-Compatible RTC in a TDFN
_______________________________________________________________________________________
3
AC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= +2.0V to +5.5V, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25C.) (Notes 1, 6)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Hold Time After (Repeated)
START Condition (After this
Period, the First Clock Is
Generated)
t
HD:STA
0.6
s
Repeated START Condition
Setup Time
t
SU:STA
0.6
s
STOP Condition Setup Time
t
SU:STO
0.6
s
Data Hold Time (Note 7)
t
HD:DAT
0
0.9
s
Data Setup Time
t
SU:DAT
100
ns
SCL Low Period
t
LOW
1.3
s
SCL High Period
t
HIGH
0.6
s
Minimum SCL/SDA Rise Time
(Note 8)
t
r
20 +
0.1C
B
ns
Maximum SCL/SDA Rise Time
(Note 8)
t
r
300
ns
Minimum SCL/SDA Fall Time
(Receiving) (Notes 8, 9)
t
f
20 +
0.1C
B
ns
Maximum SCL/SDA Fall Time
(Receiving) (Notes 8, 9)
t
f
300
ns
Minimum SDA Fall Time
(Transmitting) (Notes 8, 9)
t
f
20 +
0.1C
B
ns
Maximum SDA Fall Time
(Transmitting) (Notes 8, 9)
t
f
250
ns
Pulse Width of Spike Suppressed
t
SP
50
ns
Capacitive Load for Each
Bus Line
C
B
400
pF
Note 1: All parameters are 100% tested at T
A
= +25C. Limits over temperature are guaranteed by design and not production tested.
Note 2: I
CC
is specified with SCL = 400kHz and SDA = 400kHz.
Note 3: I
TK
is specified with SCL = Logic High (4.7k
pullup resistor) and SDA = Logic High (4.7k pullup resistor);
I
2
C-compatible bus inactive.
Note 4: MAX6900 I/O pins do not obstruct the SDA and SCL lines if V
CC
is switched off.
Note 5: Guaranteed by design. Not subject to production testing.
Note 6: All values referred to V
IH min
and V
IL max
levels.
Note 7: The MAX6900 internally provides a hold time of at least 300ns for the SDA signal (referred to the V
IH min
of the SCL signal)
in order to bridge the undefined region of the falling edge of SCL.
Note 8: C
B
= total capacitance of one bus line in pF.
Note 9: The maximum t
f
for the SDA and SCL bus lines is specified at 300ns. The maximum fall time for the SDA output stage t
f
is
specified at 250ns. This allows series protection resistors to be connected between the SDA/SCL pins and the SDA/SCL
bus lines without exceeding the maximum specified t
f
.
Detailed Description
The MAX6900 contains eight timekeeping registers,
burst address registers, a control register, an on-chip
32.768kHz oscillator circuit, and a serial 2-wire, I
2
C-
compatible interface. There are also 31 bytes, 8 bits
wide of SRAM on board. Time and calendar data are
stored in the registers in a binary-coded decimal (BCD)
format. Figure 1 shows an I
2
C-bus-compatible timing
diagram. Figure 2 shows the MAX6900 functional dia-
gram.
Real-Time Clock
The RTC provides seconds, minutes, hours, day, date,
month, and year information. The end of the month is
automatically adjusted for months with fewer than 31
MAX6900
I
2
C-Compatible RTC in a TDFN
4
_______________________________________________________________________________________
Typical Operating Characteristics
(T
A
= +25C, unless otherwise noted.)
0
0.3
0.4
0.1
0.2
0.6
0.5
1.0
0.7
0.8
0.9
1.1
1.4
1.5
1.2
1.3
1.6
1.0
2.0 2.5 3.0
1.5
3.5 4.0 4.5
5.5
5.0
6.0
TIMEKEEPING CURRENT vs. V
CC
MAX6900 toc01
V
CC
(V)
TIMEKEEPING CURRENT (
A)
Pin Description
PIN
NAME
FUNCTION
1
V
CC
Power Supply
2
X1
32.768kHz External Crystal
3
X2
32.768kHz External Crystal
4
GND
Ground
5
SCL
I
2
C-Bus-Compatible Clock Input
6
SDA
I
2
C-Bus-Compatible Data
Input/Output
--
PAD
Ground
Figure 1. Detailed
I
2C-Bus Timing Diagrams
PROTOCOL
START
CONDITION
(S)
ACKNOWLEDGE
(A)
STOP
CONDITION
(P)
BIT 7
MSB
(A7)
BIT 0
LSB
(R/W)
BIT 6
(A6)
SCL
t
SU:STA
t
HD:STA
t
HD:DAT
t
HD:DAT
t
SU:STO
1/f
SCL
t
HIGH
t
LOW
t
BUF
t
r
t
f
SDA
days, including corrections for leap year up to the year
2100.
Crystal Oscillator
The MAX6900 uses an external, standard 12.5pF load
watch crystal. No other external components are
required for this timekeeping oscillator. Power-up oscil-
lator start-time is dependent mainly upon applied V
CC
and ambient temperature. The MAX6900, because of
its low timekeeping current, exhibits a typical startup
time between 5s to 10s.
I
2
C-Compatible Interface
Interfacing the MAX6900 with a microprocessor or
other I
2
C master is made easier by using the serial, I
2
C-
bus-compatible or other I
2
C master interface. Only 2
wires are required to communicate with the clock and
SRAM: SCL (serial clock) and SDA (data line). Data is
transferred to and from the MAX6900 over the I/O data
line, SDA. The MAX6900 uses 7-bit slave ID address-
ing. The MAX6900 does not respond to general call
address commands.
Applications Information
I
2
C-Bus-Compatible Interface
The I
2
C-bus-compatible serial interface allows bidirec-
tional, 2-wire communication between multiple ICs. The
two lines are SDA and SCL. Connect both lines to a
positive supply through individual pullup resistors. A
device on the I
2
C-compatible bus that generates a
message is called a transmitter and a device that
receives the message is a receiver. The device that
controls the message is the master and the devices
that are controlled by the master are called slaves
(Figure 3). The word message refers to data in the form
of three 8-bit bytes for a Single Read or Write. The first
byte is the Slave ID byte, the second byte is the
Address/Command byte, and the third is the data.
Data transfer can only be initiated when the bus is not
busy (both SDA and SCL are high). A high-to-low tran-
sition of SDA while SCL is high is defined as the Start
(S) condition; low-to-high transition of the data line
while SCL is high is defined as the Stop (P) condition
(Figure 4).
MAX6900
I
2
C-Compatible RTC in a TDFN
_______________________________________________________________________________________
5
Figure 2. Functional Diagram
OSCILLATOR
32.768kHz
CONTROL
LOGIC
ADDRESS
REGISTER
31 X 8
SRAM
I
2
C BUS
INTERFACE
DIVIDER
SECONDS
MINUTES
HOURS
DATE
MONTH
DAY
YEAR
CONTROL
CENTURY
CLOCK
BURST
1Hz
X1
X2
VCC
GND
SCL
SDA