LM4855
Integrated Audio Amplifier System
General Description
The LM4855 is an audio power amplifier system capable of
delivering 1.1W (typ) of continuous average power into a
mono 8
bridged-tied load (BTL) with 1% THD+N and
115mW (typ) per channel of continuous average power into
stereo 32
BTL loads with 0.5% THD+N, using a 5V power
supply.
The LM4855 features a 32 step digital volume control and
eight distinct output modes. The digital volume control and
output modes are programmed through a three-wire SPI
serial control interface, that allows flexibility in routing and
mixing audio channels.
The LM4855 is designed for cellular phone, PDA, and other
portable handheld applications. It delivers high quality output
power from a surface-mount package and requires only six
external components.
The industry leading micro SMD package only utilizes 2mm
x 2.3mm of PCB space, making the LM4855 the most space
efficient audio sub system available today.
Key Specifications
n
THD+N at 1kHz, 1.1W into 8
BTL
1.0% (typ)
n
THD+N at 1kHz, 115mW into 32
BTL
0.5% (typ)
n
Single Supply Operation
2.6 to 5.0V
Features
n
1.1W (typ) output power with 8
mono BTL load
n
115mW (typ) output power with stereo 32
BTL loads
n
SPI programmable 32 step digital volume control
n
Eight distinct output modes
n
micro-SMD and LLP surface mount packaging
n
"Click and Pop" suppression circuitry
n
Thermal shutdown protection
n
Low shutdown current (0.1uA, typ)
Applications
n
Moblie Phones
n
PDAs
Typical Application
Boomer
is a registered trademark of National Semiconductor Corporation.
200395D1
FIGURE 1. Typical Audio Amplifier Application Circuit
November 2002
LM4855
Integrated
Audio
Amplifier
System
2002 National Semiconductor Corporation
DS200395
www.national.com
Connection Diagrams
18-Bump micro SMD Marking (IBL)
18-Bump micro SMD Marking (ITL)
200395B0
Top View
XY- Date Code
TT - Die Traceability
G - Boomer Family
55 - LM4855IBL
200395E4
Top View
XY- Date Code
TT - Die Traceability
G - Boomer Family
A9 - LM4855ITL
LLP Package
200395D3
Top View
Order Number LM4855LQ
See NS Package Number LQA24A for Exposed-DAP LLP
200395A9
Top View
(Bump-side down)
Order Number LM4855ITL, LM4855IBL
See NS Package Number TLA18AAA, BLA18AAB
LM4855
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2
Absolute Maximum Ratings
(Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
6.0V
Storage Temperature
-65C to +150C
ESD Susceptibility (Note 4)
2.0kV
ESD Machine model (Note 7)
200V
Junction Temperature (T
J
)
150C
Solder Information (Note 1)
Vapor Phase (60 sec.)
215C
Infrared (15 sec.)
220C
Thermal Resistance
JA
(typ) - LQA24A
42C/W
JC
(typ) - LQA24A
3.0C/W
JA
(typ) - BLA18AAB
48C/W (Note 9)
JC
(typ) - BLA18AAB
23C/W (Note 9)
JA
(typ) - TLA18AAA
48C/W (Note 9)
JC
(typ) - TLA18AAA
23C/W (Note 9)
Operating Ratings
(Note 3)
Temperature Range
-40C to 85C
Supply Voltage V
DD
2.6V
V
DD
5.0V
Note 1: See AN-450 "Surface Mounting and their effects on Product Reli-
ability" for other methods of soldering surface mount devices.
Electrical Characteristics
(Notes 3, 8)
The following specifications apply for V
DD
= 5.0V, T
A
= 25C unless otherwise specified.
Symbol
Parameter
Conditions
LM4855
Units
(Limits)
Typical
(Note 5)
Limits
(Note 6)
I
DD
Supply Current
Output mode 1
V
IN
= 0V; No loads
5.7
8
mA (max)
Output mode 1
V
IN
= 0V; Loaded (Fig.1)
6.7
9
mA (max)
Output modes 2, 3, 4, 5, 6, 7
V
IN
= 0V; No loads
7.5
11
mA (max)
Output modes 2, 3, 4, 5, 6, 7
V
IN
= 0V; Loaded (Fig. 1)
8.5
12
mA (max)
I
SD
Shutdown Current
Output mode 0
0.1
2.0
A (max)
V
OS
Output Offset Voltage
V
IN
= 0V
5.0
40
mV (max)
P
O
Output Power
SPKR
OUT
; R
L
= 4
THD+N = 1%; f = 1kHz, LM4855LQ
1.5
W
SPKR
OUT
; R
L
= 8
THD+N = 1%; f = 1kHz
1.1
0.8
W (min)
R
OUT
and L
OUT
; R
L
= 32
THD+N = 0.5%; f = 1kHz
115
70
mW (min)
THD+N
Total Harmonic Distortion Plus
Noise
SPKR
OUT
f = 20Hz to 20kHZ
P
OUT
= 400mW; R
L
= 8
0.5
%
R
OUT
and L
OUT
f = 20Hz to 20kHZ
P
OUT
= 50mW; R
L
= 32
0.5
%
N
OUT
Output Noise
A-weighted (Note 10)
29
V
LM4855
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3
Electrical Characteristics
(Notes 3, 8) (Continued)
The following specifications apply for V
DD
= 5.0V, T
A
= 25C unless otherwise specified.
Symbol
Parameter
Conditions
LM4855
Units
(Limits)
Typical
(Note 5)
Limits
(Note 6)
PSRR
Power Supply Rejection Ratio
SPKR
OUT
V
RIPPLE
= 200mV
PP
; f = 217Hz, C
B
=
1.0F
All audio inputs terminated into 50
;
Output referred Gain (BTL) = 12dB
Output Mode 1, 3, 5, 7
57
54
dB (min)
Power Supply Rejection Ratio
R
OUT
and L
OUT
V
RIPPLE
= 200mV
PP
; f = 217Hz, C
B
=
1.0F
All audio inputs terminated into 50
;
Output referred Maximum gain setting
Output Mode 2, 3
62
59
dB (min)
Output Mode 4, 5
57
54
dB (min)
Output Mode 6, 7
54
51
dB (min)
V
IH
Logic High Input Voltage
1.4
V
DD
V (min)
V (max)
V
IL
Logic Low Input Voltage
0.4
GND
V (max)
V (min)
Digital Volume Range (R
IN
and
L
IN
)
Input referred minimum gain
-34.5
-35.1
-33.9
dB (min)
dB (max)
Input referred maximum gain
12.0
11.4
12.6
dB (min)
dB (max)
Digital Volume Stepsize
1.5
dB
Digital Volume Stepsize Error
0.1
0.6
dB ( max)
Phone_In_IHF Volume
BTL gain from Phone_In _IHF to
SPKR
OUT
12
11.4
12.6
dB (min)
dB (max)
Phone _In_IHF Mute Attenuation
Output Mode 2, 4, 6
80
72
dB (min)
Phone_In_IHF Input Impedance
20
15
25
k
(min)
k
(max)
Phone_In_HS Input Impedance
Maximum gain setting
50
37.5
62.5
k
(min)
k
(max)
Mininum gain setting
100
75
125
k
(min)
k
(max)
R
IN
and L
IN
Input Impedance
Maximum gain setting
33.5
25
42
k
(min)
k
(max)
Mininum gain setting
100
75
125
k
(min)
k
(max)
t
SD
Thermal Shutdown Temperature
170
150
C (min)
t
ES
Enable Setup Time (ENB)
20
ns (min)
t
EH
Enable Hold Time (ENB)
20
ns (min)
t
EL
Enable Low Time (ENB)
30
ns (min)
t
DS
Data Setup Time (DATA)
20
ns (min)
t
DH
Data Hold Time (DATA)
20
ns (min)
t
CS
Clock Setup Time (CLK)
20
ns (min)
t
CH
Clock Logic High Time (CLK)
50
ns (min)
t
CL
Clock Logic Low Time (CLK)
50
ns (min)
f
CLK
Clock Frequency
DC
10
(min)
MHz (max)
LM4855
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Electrical Characteristics
(Notes 2, 8)
The following specifications apply for V
DD
= 3.0V, T
A
= 25C unless otherwise specified.
Symbol
Parameter
Conditions
LM4855
Units
(Limits)
Typical
(Note 5)
Limits
(Note 6)
I
DD
Supply Current
Output mode 1
V
IN
= 0V; No loads
4.5
7
mA (max)
Output mode 1
V
IN
= 0V; Loaded (Fig.1)
5.0
8
mA (max)
Output modes 2, 3, 4, 5, 6, 7
V
IN
= 0V; No loads
6.5
10
mA (max)
Output modes 2, 3, 4, 5, 6, 7
V
IN
= 0V; Loaded (Fig. 1)
7
11
mA (max)
I
SD
Shutdown Current
Output mode 0
0.1
2.0
A (max)
V
OS
Output Offset Voltage
V
IN
= 0V
5.0
40
mV (max)
P
O
Output Power
SPKR
OUT
; R
L
= 4
THD+N = 1%; f = 1kHz, LM4855LQ
430
mW
SPKR
OUT
; R
L
= 8
THD+N = 1%; f = 1kHz
340
300
mW (min)
R
OUT
and L
OUT
; R
L
= 32
THD+N = 0.5%; f = 1kHz
25
20
mW (min)
THD+N
Total Harmonic Distortion Plus
Noise
SPKR
OUT
f = 20Hz to 20kHZ
P
OUT
= 250mW; R
L
= 8
0.5
%
R
OUT
and L
OUT
f = 20Hz to 20kHZ
P
OUT
= 20mW; R
L
= 32
0.5
%
N
OUT
Output Noise
A-weighted (Note 10)
29
V
PSRR
Power Supply Rejection Ratio
SPKR
OUT
V
RIPPLE
= 200mV
PP
; f = 217Hz, C
B
=
1.0F
All audio inputs terminated into 50
;
Output referred Gain (BTL) = 12dB
Output Mode 1, 3, 5, 7
58
55
dB (min)
Power Supply Rejection Ratio
R
OUT
and L
OUT
V
RIPPLE
= 200mV
PP
; f = 217Hz, C
B
=
1.0F
All audio inputs terminated into 50
;
Output referred Maximum gain setting
Output Mode 2, 3
63
60
dB (min)
Output Mode 4, 5
58
55
dB (min)
Output Mode 6, 7
55
52
dB (min)
V
IH
Logic High Input Voltage
1.4
V
DD
V (min)
V (max)
V
IL
Logic Low Input Voltage
0.4
GND
V (max)
V (min)
LM4855
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