TL W 12339
LMX2315LMX2320LMX2325
PLLatinum
Frequency
Synthesizer
for
RF
Personal
Communications
LMX2325
25
GHz
LMX2320
20
GHz
LMX2315
12
GHz
September 1996
LMX2315 LMX2320 LMX2325 PLLatinum
TM
Frequency Synthesizer
for RF Personal Communications
LMX2325 2 5 GHz
LMX2320 2 0 GHz
LMX2315 1 2 GHz
General Description
The LMX2315 2320 2325's are high performance frequen-
cy synthesizers with integrated prescalers designed for RF
operation up to 2 5 GHz They are fabricated using Nation-
al's ABiC IV BiCMOS process
A 64 65 or a 128 129 divide ratio can be selected for the
LMX2315 and LMX2320 RF synthesizer at input frequencies
of up to 1 2 GHz and 2 0 GHz while 32 33 and 64 65 divide
ratios are available in the 2 5 GHz LMX2325 Using a propri-
etary digital phase locked loop technique the LMX2315
2320 2325's linear phase detector characteristics can gen-
erate very stable low noise signals for controlling a local
oscillator
Serial data is transferred into the LMX2320 and the
LMX2325 via a three line MICROWIRE
TM
interface (Data
Enable Clock) Supply voltage can range from 2 7V to 5 5V
The LMX2315 LMX2320 and the LMX2325 feature very low
current consumption typically 6 mA 10 mA and 11 mA re-
spectively
The LMX2315 LMX2320 and the LMX2325 are available in
a TSSOP 20-pin surface mount plastic package
Features
Y
RF operation up to 2 5 GHz
Y
2 7V to 5 5V operation
Y
Low current consumption
Y
Dual modulus prescaler
LMX2325
32 33 or 64 65
LMX2320 LMX2315
64 65 or 128 129
Y
Internal balanced low leakage charge pump
Y
Power down feature for sleep mode
I
CC
e
30 mA (typ) at V
CC
e
3V
Y
Small-outline
plastic
surface mount TSSOP
0 173
wide
Applications
Y
Cellular telephone systems
(GSM IS-54 IS-95 (RCR-27)
Y
Portable wireless communications (DECT PHS)
Y
CATV
Y
Other wireless communication systems
Block Diagram
TL W 12339 1
TRI-STATE
is a registered trademark of National Semiconductor Corporation
MICROWIRE
TM
and PLLatinum
TM
are trademarks of National Semiconductor Corporation
C1996 National Semiconductor Corporation
RRD-B30M106 Printed in U S A
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Connection Diagrams
LMX2315 LMX2320 LMX2325
TL W 12339 2
20-Lead (0 173 Wide) Thin Shrink Small Outline Package (TM)
Order Number LMX2315TM LMX2315TMX LMX2325TM LMX2325TMX LMX2320TM or LMX2320TMX
See NS Package Number MTC20
Pin Descriptions
Pin No
Pin Name
I O
Description
1
OSC
IN
I
Oscillator input A CMOS inverting gate input intended for connection to a crystal resonator for
operation as an oscillator The input has a V
CC
2 input threshold and can be driven from an external
CMOS or TTL logic gate May also be used as a buffer for an externally provided reference oscillator
3
OSC
OUT
O
Oscillator output
4
V
P
Power supply for charge pump Must be
t
V
CC
5
V
CC
Power supply voltage input Input may range from 2 7V to 5 5V Bypass capacitors should be placed
as close as possible to this pin and be connected directly to the ground plane
6
D
o
O
Internal charge pump output For connection to a loop filter for driving the input of an external VCO
7
GND
Ground
8
LD
O
Lock detect Output provided to indicate when the VCO frequency is in ``lock'' When the loop is
locked the pin's output is HIGH with narrow low pulses
10
f
IN
I
Prescaler input Small signal input from the VCO
11
CLOCK
I
High impedance CMOS Clock input Data is clocked in on the rising edge into the various counters
and registers
13
DATA
I
Binary serial data input Data entered MSB first LSB is control bit High impedance CMOS input
14
LE
I
Load enable input (with internal pull-up resistor) When LE transitions HIGH data stored in the shift
registers is loaded into the appropriate latch (control bit dependent) Clock must be low when LE
toggles high or low See Serial Data Input Timing Diagram
15
FC
I
Phase control select (with internal pull-up resistor) When FC is LOW the polarity of the phase
comparator and charge pump combination is reversed
16
BISW
O
Analog switch output When LE is HIGH the analog switch is ON routing the internal charge pump
output through BISW (as well as through D
o
)
17
f
OUT
O
Monitor pin of phase comparator input CMOS output
18
w
p
O
Output for external charge pump w
p
is an open drain N-channel transistor and requires a pull-up
resistor
19
PWDN
I
Power Down (with internal pull-up resistor)
PWDN
e
HIGH for normal operation
PWDN
e
LOW for power saving
Power down function is gated by the return of the charge pump to a TRI-STATE condition
20
w
r
O
Output for external charge pump w
r
is a CMOS logic output
2 9 12
NC
No connect
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2
Functional Block Diagram
TL W 12339 3
Note 1
The prescalar for the LMX2315 and LMX2320 is either 64 65 or 128 129 while the prescalar for the LMX2325 is 32 33 or 64 65
Note 2
The power down function is gated by the charge pump to prevent unwanted frequency jumps Once the power down pin is brought low the part will go into
power down mode when the charge pump reaches a TRI-STATE condition
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Absolute Maximum Ratings
(Notes 1 2)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Power Supply Voltage
V
CC
b
0 3V to
a
6 5V
V
P
b
0 3V to
a
6 5V
Voltage on Any Pin
with GND
e
0V (V
I
)
b
0 3V to
a
6 5V
Storage Temperature Range (T
S
)
b
65 C to
a
150 C
Lead Temperature (T
L
) (solder 4 sec )
a
260 C
Recommended Operating
Conditions
Power Supply Voltage
V
CC
2 7V to 5 5V
V
P
V
CC
to
a
5 5V
Operating Temperature (T
A
)
b
40 C to
a
85 C
Note 1
Absolute Maximum Ratings indicate limits beyond which damage to
the device may occur Operating Ratings indicate conditions for which the
device is intended to be functional but do not guarantee specific perform-
ance limits For guaranteed specifications and test conditions see the Elec-
trical Characteristics The guaranteed specifications apply only for the test
conditions listed
Note 2
This device is a high performance RF integrated circuit with an ESD
rating
k
2 kV and is ESD sensitive Handling and assembly of this device
should be done at ESD workstations
Electrical Characteristics
LMX2325 and LMX2320 V
CC
e
V
P
e
3 0V LMX2315 V
CC
e
V
P
e
5 0V
b
40 C
k
T
A
k
85 C except as specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
I
CC
Power Supply Current
LMX2315
V
CC
e
3 0V
6 0
8 0
mA
V
CC
e
5 0V
6 5
8 5
mA
LMX2320
V
CC
e
3 0V
10
13 5
mA
LMX2325
V
CC
e
3 0V
11
15
mA
I
CC-PWDN
Power Down Current
V
CC
e
3 0V
30
180
m
A
V
CC
e
5 0V
60
350
m
A
f
IN
Maximum Operating Frequency
LMX2315
1 2
LMX2320
2 0
GHz
LMX2325
2 5
f
OSC
Oscillator Frequency
5
20
MHz
No Load on OSC
out
5
40
MHz
f
w
Phase Detector Frequency
10
MHz
Pf
IN
Input Sensitivity
V
CC
e
2 7V to 3 3V
b
15
a
6
dBm
V
CC
e
3 3V to 5 5V
b
10
a
6
V
OSC
Oscillator Sensitivity
OSC
IN
0 5
V
PP
V
IH
High-Level Input Voltage
0 7 V
CC
V
V
IL
Low-Level Input Voltage
0 3 V
CC
V
I
IH
High-Level Input Current (Clock Data)
V
IH
e
V
CC
e
5 5V
b
1 0
1 0
m
A
I
IL
Low-Level Input Current (Clock Data)
V
IL
e
0V V
CC
e
5 5V
b
1 0
1 0
m
A
I
IH
Oscillator Input Current
V
IH
e
V
CC
e
5 5V
100
m
A
I
IL
V
IL
e
0V V
CC
e
5 5V
b
100
m
A
I
IH
High-Level Input Current (LE FC)
V
IH
e
V
CC
e
5 5V
b
1 0
1 0
m
A
I
IL
Low-Level Input Current (LE FC)
V
IL
e
0V V
CC
e
5 5V
b
100
1 0
m
A
Except f
IN
and OSC
IN
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Electrical Characteristics
LMX2325 and LMX2320 V
CC
e
V
P
e
3 0V LMX2315 V
CC
e
V
P
e
5 0V
b
40 C
k
T
A
k
85 C except as specified (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
I
Do-source
Charge Pump Output Current
V
CC
e
V
P
e
3 0V V
Do
e
V
P
2
b
2 5
mA
I
Do-sink
V
CC
e
V
P
e
3 0V V
Do
e
V
P
2
2 5
mA
I
Do-source
Charge Pump Output Current
V
CC
e
V
P
e
5 0V V
Do
e
V
P
2
b
5 0
mA
I
Do-sink
V
CC
e
V
P
e
5 0V V
Do
e
V
P
2
5 0
mA
I
Do-Tri
Charge Pump TRI-STATE Current
0 5V
s
V
Do
s
V
P
b
0 5V
b
2 5
2 5
nA
T
e
85 C
I
Do
vs V
Do
Charge Pump Output Current
0 5V
s
V
Do
s
V
P
b
0 5V
Magnitude Variation vs Voltage
T
e
25 C
15
%
(Note 1)
I
Do-sink
vs
Charge Pump Output Current
V
Do
e
V
P
2
I
Do-source
Sink vs Source Mismatch
T
e
25 C
10
%
(Note 2)
I
Do
vs T
Charge Pump Output Current
b
40 C
k
T
k
85 C
Magnitude Variation vs Temperature
V
Do
e
V
P
2
10
%
(Note 3)
V
OH
High-Level Output Voltage
I
OH
e b
1 0 mA
V
CC
b
0 8
V
V
OL
Low-Level Output Voltage
I
OL
e
1 0 mA
0 4
V
V
OH
High-Level Output Voltage (OSC
OUT
)
I
OH
e b
200 mA
V
CC
b
0 8
V
V
OL
Low-Level Output Voltage (OSC
OUT
)
I
OL
e
200 mA
0 4
V
I
OL
Open Drain Output Current (w
p
)
V
CC
e
5 0V V
OL
e
0 4V
1 0
mA
I
OH
Open Drain Output Current (w
p
)
V
OH
e
5 5V
100
m
A
R
ON
Analog Switch ON Resistance (2315)
100
X
t
CS
Data to Clock Set Up Time
See Data Input Timing
50
ns
t
CH
Data to Clock Hold Time
See Data Input Timing
10
ns
t
CWH
Clock Pulse Width High
See Data Input Timing
50
ns
t
CWL
Clock Pulse Width Low
See Data Input Timing
50
ns
t
ES
Clock to Enable Set Up Time
See Data Input Timing
50
ns
t
EW
Enable Pulse Width
See Data Input Timing
50
ns
Except OSC
OUT
Notes 1 2 3
See related equations in Charge Pump Current Specification Definitions
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