LMX2377U
PLLatinum
TM
Ultra Low Power Dual Frequency
Synthesizer for RF Personal Communications
2.5 GHz/1.2 GHz
General Description
The LMX2377U device is a high performance frequency
synthesizer with integrated dual modulus prescalers. The
LMX2377U device is designed for use as a local oscillator for
the first and second RF of a dual conversion radio trans-
ceiver.
A 16/17 or a 32/33 prescale ratio can be selected for the
Main synthesizer. An 8/9 or a 16/17 prescale ratio can be
selected for the Aux synthesizer. Using a proprietary digital
phase lock technique, the LMX2377U device generates very
stable, low noise control signals for UHF and VHF voltage
controlled oscillators. Both the Main and Aux synthesizers
include a two-level programmable charge pump. The Main
synthesizer has dedicated Fastlock circuitry.
Serial data is transferred to the devices via a three-wire
interface (Data, LE, Clock). The low voltage logic interface
allows connection to 1.8V devices. Supply voltages from
2.7V to 5.5V are supported. The LMX2377U features ultra
low current consumption, typically 3.5 mA at 3.0V.
The LMX2377U devices are available in 20-Pin TSSOP,
24-Pin CSP, and 20-Pin UTCSP surface mount plastic pack-
ages.
Features
n
Ultra Low Current Consumption
n
Upgrade and Compatible to the LMX2370
n
2.7V to 5.5V Operation
n
1.8V to 5.0V MICROWIRE Logic Interface
n
Selectable Synchronous or Asynchronous Powerdown
Mode:
I
CC-PWDN
= 1 A typical
n
Selectable Dual Modulus Prescaler:
Main: 16/17 or 32/33
Aux: 8/9 or 16/17
n
Selectable Charge Pump TRI-STATE
Mode
n
Programmable Charge Pump Current Levels
Main and Aux: 0.95 or 3.8 mA
n
Selectable Fastlock
TM
Mode for the Main Synthesizer
n
Open Drain Analog Lock Detect Output
n
Available in 20-Pin TSSOP, 24-Pin CSP, and 20-Pin
UTCSP
Applications
n
Mobile Handsets
(GSM, GPRS, W-CDMA, CDMA, PCS, AMPS, PDC,
DCS)
n
Cordless Handsets
(DECT, DCT)
n
Wireless Data
n
Cable TV Tuners
Thin Shrink Small Outline Package
(MTC20)
Chip Scale Package (SLB24A)
Ultra Thin Chip Scale Package
(SLE20A)
20022680
20022681
20022695
PLLatinum
TM
is a trademark of National Semiconductor Corporation.
November 2002
LMX2377U
PLLatinum
Ultra
Low
Power
Dual
Frequency
Synthesizer
for
RF
Personal
Communications
2002 National Semiconductor Corporation
DS200226
www.national.com
Connection Diagrams
Thin Shrink Small Outline Package (TM)
(Top View)
Chip Scale Package (SLB)
(Top View)
20022602
20022603
Ultra Thin Chip Scale Package (SLE)
(Top View)
20022696
Pin Descriptions
Pin
Name
Pin No.
20-Pin UTCSP
Pin No.
24-Pin CSP
Pin No.
20-Pin
TSSOP
I/O
Description
V
CC
20
24
1
--
Power supply bias for the Main PLL analog and digital circuits. V
CC
may range from 2.7V to 5.5V. Bypass capacitors should be placed
as close as possible to this pin and be connected directly to the
ground plane.
V
P
Main
1
2
2
--
Main PLL charge pump power supply. Must be
V
CC
.
D
o
Main
2
3
3
O
Main PLL charge pump output. The output is connected to the
external loop filter, which drives the input of the VCO.
GND
3
4
4
--
Ground for the Main PLL digital circuitry.
f
IN
Main
4
5
5
I
Main PLL prescaler input. Small signal input from the VCO.
LMX2377U
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3
Pin Descriptions
(Continued)
Pin
Name
Pin No.
20-Pin UTCSP
Pin No.
24-Pin CSP
Pin No.
20-Pin
TSSOP
I/O
Description
f
IN
Main
5
6
6
I
Main prescaler complementary input. For single ended operation,
this pin should be AC grounded. The LMX2377U Main PLL can be
driven differentially when the bypass capacitor is omitted.
GND
6
7
7
--
Ground for the Main PLL analog circuitry.
OSC
in
7
8
8
I
Reference oscillator input. It has an approximate V
CC
/2 input
threshold and can be driven from an external CMOS or TTL logic
gate.
GND
8
10
9
--
Ground for the Aux PLL digital circuitry, MICROWIRE, F
o
LD, and
oscillator circuits.
F
o
LD
9
11
10
O
Programmable multiplexed output pin. Functions as a general
purpose CMOS TRI-STATE output, Main/Aux PLL open drain
analog lock detect output, N and R divider output or Fastlock
output, which connects a parallel resistor to the external loop filter.
Clock
10
12
11
I
MICROWIRE Clock input. High impedance CMOS input. Data is
clocked into the 22-bit shift register on the rising edge of Clock.
Data
11
14
12
I
MICROWIRE Data input. High impedance CMOS input. Binary
serial data. The MSB of Data is shifted in first. The last two bits
are the control bits.
LE
12
15
13
I
MICROWIRE Latch Enable input. High impedance CMOS input.
When LE transitions HIGH, Data stored in the shift register is
loaded into one of 4 internal control registers.
Vc
13
16
14
--
Power supply bias for the MICROWIRE circuitry. Must be
V
CC
.
Typically connected to the same supply level as the
microprocessor or baseband controller to enable programming at
low voltages.
GND
14
17
15
--
Ground for the Aux PLL analog circuitry.
f
IN
Aux
15
18
16
I
Aux PLL prescaler input. Small signal input from the VCO.
GND
16
19
17
--
Ground for the Aux PLL digital circuitry, MICROWIRE, F
o
LD, and
oscillator circuits.
D
o
Aux
17
20
18
O
Aux PLL charge pump output. the output is connected to an
external loop filter, which drives the input of the VCO.
V
P
Aux
18
22
19
--
Aux PLL charge pump power supply. Must be
V
CC
.
V
CC
19
23
20
--
Power supply bias for the Aux PLL analog and digital circuits,
F
o
LD, and oscillator circuits. V
CC
may range from 2.7V to 5.5V.
Bypass capacitors should be placed as close as possible to this
pin and be connected directly to the ground plane.
NC
--
1, 9, 13, 21
--
--
No Connect
LMX2377U
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4
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