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Oki Semiconductor
Contents
Description................................................................................................................................................................ 1
Features ..................................................................................................................................................................... 1
Signal Descriptions .................................................................................................................................................. 4
Functional Description ............................................................................................................................................ 7
Protocol Engine .................................................................................................................................................. 7
DPLL..................................................................................................................................................................... 7
Timer .................................................................................................................................................................... 7
Status/Control ................................................................................................................................................... 7
FIFO Control ...................................................................................................................................................... 7
Application Interface ......................................................................................................................................... 8
Frame Timer Synthesizer................................................................................................................................... 8
Remote Wakeup.................................................................................................................................................. 8
USB Transfers ..................................................................................................................................................... 8
USB Interface ...................................................................................................................................................... 8
Glossary ..................................................................................................................................................................... 9
Appendix ................................................................................................................................................................. 10
1
Oki Semiconductor
W712 USB Device Controller
0.5
m Technology Mega Macrofunction
DESCRIPTION
The Universal Serial Bus (USB) Device Controller Mega Macrofunction is a featured element in Oki's
0.5
m Sea of Gates (SOG) and Customer Structured Array (CSA) families. Oki's USB mega macrofunction
provides a USB interface, control/status block, FIFO control, and application interface in two highly inte-
grated submodules for system design interfaces based on the USB protocol. The submodule partitioning
allows custom configurations to be easily developed. The USB mega macrofunction connects an industry
standard USB interface with a microprocessor-style parallel application interface. This straightforward
interface permits easy integration of the USB mega macrofunction to the target application. Using Oki's
USB mega macrofunction, designers can reduce development time, risk, and introduce their USB based
products to market faster. Oki's W712 USB Device Controller mega macrofunction provides a complete
USB device interface solution and is fully compliant with the Universal Serial Bus 1.0 specification. For
more details on the Universal Serial Bus 1.0 specification, refer to www.usb.org.
FEATURES
Supported ASIC Families
Family Name
Family Type
MSM13R0000
Sea of Gates
MSM98R000
Customer Structured Array
USB 1.0 compliant
Full-speed (12 Mb/sec) and low-speed (1.5 Mb/sec)
support
Microprocessor-style parallel application interface
Supports isochronous, control, interrupt and bulk
transfers
Supports four transmit FIFO's
- Three 64 byte
- One 2 Kbyte (2-level)
Supports four receive FIFO's
- Three 64 byte
- One 2 Kbyte (2-level)
Supports one control endpoint and six
additional endpoint addresses
Expandable up to 32 endpoint addresses
Customizable to specific application
requirements
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W712 USB Device Controller
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Oki Semiconductor
Figure 1. Logic Symbol
Recommended Operating Conditions (V
SS
= 0 V)
Parameter
Symbol
Min.
Typ.
Max
Unit
Power supply voltage
V
DD
2.7
3.3
3.6
V
Operating temperature
T
j
-40
+25
+85
C
Mega Macrofunction Characteristics
Mega Macrofunction
Description
Logic Gate Count
Logic Pin Count
W712
USB Device Controller
15797
139
usb_dpin
usb_dmin
usb_rxd
usb_dpout
usb_dmout
usb_txenb
full_spden
sel_ext_pll
sys_clock
[7:0]ma
[7:0]md
mrdyb
[7:0]pd
[3:0]pkt_rdy
setup_rdy
[7:0]trx_out_data
[7:0]rcv_out_data
[7:0]trx_in_data
[2:0]trx_sel
[8:0]trx_wr_ptr
[6:0]trx_wrb
[7:0]rcv_in_data
[2:0]rcv_sel
[6:0]rcv_wrb
FIFO Interface
USB Interface
Application Interface
W712
sys_reset
testmode
mwr_rdb
setup_rdy2
iso_err
usb_reset
validsof
validin
validout
[8:0]trx_rd_ptr
[8:0]rcv_wr_ptr
[8:0]rcv_rd_ptr
osc_clk
usb_clk_ext
usb_rxd_out
DPLL Interface
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W712 USB Device Controller
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Oki Semiconductor
Figure 2. W712 Block Diagram
Figure 3. Example USB Mega Macrofunction Application
Protocol Engine
FIFO Control
Status/Control
Application
Interface
To
Application
Module
To FIFO's
(control)
To USB Transceiver
To FIFO's
(data path)
To FIFO's
(data path)
Clock
DPLL
W712b
Z712a
W712
Optional
External
DPLL
W712 Mega Macrofunction
Application
Interface
External
Module I/O
USB
Transceiver
Protocol
Engine
FIFO
Control
Status/
Control
FIFO(s)/
Data Mux(s)
Application
Module
Clock
USB Cable
ASIC
Data Path
Data Path
DPLL
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