1
PS8093B 10/09/00
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16-Bit Transparent D-Type Latch
with 3-STATE Outputs
PI74ALVCH16373
Product Description
Pericom Semiconductor's PI74ALVCH series of logic circuits are
produced in the Company's advanced 0.5 micron CMOS
technology, achieving industry leading speed.
This 16-bit transparent D-type latch is designed for 2.3V to 3.6V
V
CC
operation.
The PI74ALVCH16373 is particularly suitable for implementing
buffer registers, I/O ports, bidirectional bus drivers, and working
registers. This device can be used as two 8-bit latches or one 16-bit
latch. When the Latch Enable (LE) input is HIGH, the Q outputs
follow the (D) inputs. When LE is taken LOW, the Q outputs are
latched at the levels set up at the D inputs.
A buffered Output Enable (OE) input can be used to place the
eight outputs in either a normal logic state (high or low logic
levels) or a high-impedance state in which the outputs neither
load nor drive the bus lines significantly. The high-impedance state
and the increased drive provide the capability to drive bus lines
without need for interface or pullup components. OE does not
affect internal operations of the latch. Old data can be retained
or new data can be entered while the outputs are in the high
impedance state.
To ensure the high impedance state during power up or power
down, OE should be tied to V
CC
through a pullup resistor; the
minimum value of the resistor is determined by the current-sinking
capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
1LE
1Q1
1D
C1
1D1
To Seven Other Channels
1OE
1
48
47
2
2LE
2Q1
1D
C1
2D1
To Seven Other Channels
25
36
13
24
2OE
Product Features
PI74ALVCH16373 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25C
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at 40C to +85C
Packages available:
48-pin 240 mil wide plastic TSSOP (A)
48-pin 300 mil wide plastic SSOP (V)
Logic Block Diagram
2
PS8093B 10/09/00
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PI74ALVCH16373
16-Bit Transparent D-Type Latch
with 3-STATE Outputs
s
t
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O
E
O
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L
D
Q
L
H
H
H
L
H
L
L
L
L
X
Q
0
H
X
X
Z
Pin Name
Description
OE
Output Enable Input (Active LOW)
LE
Latch Enable (Active HIGH)
Dx
Data Inputs
Qx
3-State Outputs
GND
Ground
V
CC
Power
Product Pin Description
Truth Table
(1)
Product Pin Configuration
Notes:
1. H = High Signal Level
L = Low Signal Level
X = Irrelevant
Z = High Impedance
1
2
3
4
5
6
7
8
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
32
31
30
29
28
27
26
25
1OE
1LE
1Q1
1D1
1Q2
1D2
GND
GND
1Q3
1D3
1Q4
1D4
V
1Q5
1D5
1Q6
1D6
GND
GND
1Q7
1D7
1Q8
1D8
2Q1
2D1
2Q2
2D2
GND
GND
2Q3
2D3
2Q4
2D4
2Q5
2D5
2Q6
2D6
GND
GND
2Q7
2D7
2Q8
2D8
2OE
2LE
CC
VCC
VCC
VCC
48-Pin
V,A
PI74ALVCH16373
16-Bit Transparent D-Type Latch
with 3-STATE Outputs
3
PS8093B 10/09/00
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Storage Temperature ............................................................ 65C to +150C
Ambient Temperature with Power Applied .......................... 40C to +85C
Input Voltage Range, V
IN ....................................................
0.5V to V
CC
+0.5V
Output Voltage Range, V
OUT .............................................
0.5V to V
CC
+0.5V
DC Input Voltage ................................................................... 0.5V to +5.0V
DC Output Current .............................................................................. 100 mA
Power Dissipation ................................................................................... 1.0W
Note:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= 40C to +85C, V
CC
= 3.3V 10%)
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
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4
PS8093B 10/09/00
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12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
PI74ALVCH16373
16-Bit Transparent D-Type Latch
with 3-STATE Outputs
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25C ambient and maximum loading.
3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
DC Electrical Characteristics-
Continued (Over the Operating Range, T
A
= 40C to +85C, V
CC
= 3.3V 10%)
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Timing Requirements over Operating Range
Note:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
PI74ALVCH16373
16-Bit Transparent D-Type Latch
with 3-STATE Outputs
5
PS8093B 10/09/00
12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
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Switching Characteristics over Operating Range
(1)
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
Operating Characteristics, T
A
= 25C
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1
2
2
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O
4
5
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
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