2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

FEATURES

Clamp and Track/Hold (CTH) circuit with adjustable
bandwidth, Programmable Gain Amplifier (PGA), 12-bit
Analog-to-Digital Converter (ADC) and reference
regulator

Fully programmable via a 3-wire serial interface

Sampling frequency up to 30 MHz

PGA gain from 0 to 36 dB (in 0.05 dB steps)

CTH programmable bandwidth from 35 to 284 MHz
typical

Standby mode (20 mW typical)

Low power consumption of only 425 mW typical

5 V operation and 2.5 to 5.25 V operation for the digital
outputs

TTL compatible inputs; TTL and CMOS compatible
outputs.

APPLICATIONS

CCD camera systems.

GENERAL DESCRIPTION

The TDA9965 is a 12-bit analog-to-digital interface for a
CCD camera. The device includes a CTH circuit, PGA and
a low-power 12-bit ADC, together with its reference
voltage regulator.

The CTH has a bandwidth circuit controlled by on-chip
DACs via a serial interface.

A 10-bit digital clamp controls the ADC input clamp level.

ORDERING INFORMATION

QUICK REFERENCE DATA

Note

1. Noise and clamp behaviour are not guaranteed for a PGA gain higher than 30 dB.

TYPE

NUMBER

PACKAGE

NAME

DESCRIPTION

VERSION

TDA9965HL

LQFP48

plastic low profile quad flat package; 48 leads; body 7

1.4 mm

SOT313-2

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

CCA

analog supply voltage

4.75

5.25

CCD

digital supply voltage

4.75

5.25

CCO

digital output supply voltage

2.5

5.25

CCA

analog supply current

with internal regulator

CCD

digital supply current

with internal regulator

CCO

digital output supply current

pix

= 30 MHz; C

= 10 pF on all

data outputs; ramp input

ADC

res

ADC resolution

bits

i(IN)(p-p)

CTH input voltage
(peak-to-peak value)

CTH

CTH output amplifier gain

PGA

dyn

PGA dynamic range

pix(max)

maximum pixel frequency

code f

co(CTH)

= 0000

MHz

tot(rms)

total noise from CTH input to ADC
output (RMS value)

PGA

= 0 dB;

code f

co(CTH)

= 0000

0.85

LSB

n(i)(eq)(rms)

equivalent input noise
(RMS value)

PGA

= 30 dB;

code f

co(CTH)

= 0000; note 1

tot

total power consumption

425

2004

Jul

Philips Semiconductors

Product specification

12-bit, 5.0 V

,
30 Msps analog-to-digital

interf

ace f

or CCD camer

TD
A9965

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BLOCK DIA

GRAM

handbook, full pagewidth

FCE424

REGULATOR

12-BIT ADC

CLAMP

SERIAL

INTERFACE

OUTPUT

BUFFER

DGND2

AGND4

SHD

SHP

CLPADC

CLPOB

CLKADC

DGND1

VCCD2

VCCO2

OGND2

VCCO1

OGND1

REGEN

SEN

SCLK

SDATA

DEC

REF32

VRT

VRB

VCCA3

AGND3

ADCIN

Vref

VCCA1

VCCA2

AGND2

TDA9965

D11

STDBY

VCCD1

D10

AGND5

AGND1

n.c.

STGE

PGAOUT

REF = 3.2 V

TRACK AND HOLD

CLOCK

4-BIT DAC

10-BIT DAC

PGA

INIT-ON-

POWER

Fig.1 Block diagram.

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

PINNING

SYMBOL

PIN

DESCRIPTION

AGND4

analog ground 4

data input signal from CCD

AGND5

analog ground 5

STGE

clamp storage capacitor pin

AGND1

analog ground 1

CCA1

analog supply voltage 1

AGND2

analog ground 2

CCA2

analog supply voltage 2

ref

ADC clamp reference voltage input; short-circuited to ground via a capacitor

PGAOUT

PGA amplifier signal output

ADCIN

ADC analog signal input; externally connected to pin PGAOUT

n.c.

not connected

REGEN

regulator enable input (active HIGH)

regulator reference voltage bottom

regulator reference voltage top

DEC

regulator decoupling; decoupled to ground via a capacitor

REF32

internal reference voltage; decoupled to ground via a capacitor

CCA3

analog supply voltage 3

AGND3

analog ground 3

SEN

enable input for the serial interface shift register (active LOW)

SCLK

serial clock input for the serial interface

SDATA

serial data input: 10-bit PGA gain, 4-bit DAC for the frequency cut-off, 10 low significant bits for
the digital ADC clamp and edge pulse control

ADC digital output 0 (LSB)

ADC digital output 1

ADC digital output 2

ADC digital output 3

ADC digital output 4

ADC digital output 5

OGND1

digital output ground 1

CCO1

digital output supply voltage 1

OGND2

digital output ground 2

CCO2

digital output supply voltage 2

ADC digital output 6

ADC digital output 7

ADC digital output 8

ADC digital output 9

D10

ADC digital output 10

D11

ADC digital output 11 (MSB)

STDBY

standby control input (active HIGH); all output bits are logic 0 when standby is enabled

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

CCD1

digital supply voltage 1

DGND1

digital ground 1

CLKADC

ADC clock input

CLPADC

clamp control pulse input for ADC analog input signal

CLPOB

clamp control pulse input at optical black

SHP

preset sample and hold pulse input

SHD

data sample and hold pulse input

CCD2

digital supply voltage 2

DGND2

digital ground 2

SYMBOL

PIN

DESCRIPTION

handbook, full pagewidth

TDA9965HL

FCE531

DGND2

CCD2

SHD

SHP

CLPOB

CLP

ADC

CLKADC

DGND1

CCD1

STDBY

D11

D10

REGEN

DEC

REF32

CCA3

GND3

SEN

SCLK

ATA

AGND4

AGND5

STGE

AGND1

VCCA1

VCCA2

AGND2

Vref

PGAOUT

ADCIN

n.c.

VCCO2

OGND2

VCCO1

OGND1

Fig.2 Pin configuration.

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).

Note

1. All supplies are connected together.

HANDLING

Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

CCA

analog supply voltage

note 1

0.3

+7.0

CCD

digital supply voltage

note 1

0.3

+7.0

CCO

digital output supply voltage

note 1

0.3

+7.0

supply voltage difference

between V

CCA

and V

CCD

1.0

+1.0

between V

CCD

and V

CCO

1.0

+4.0

input voltage

referenced to AGND

0.3

+7.0

output current

+10

stg

storage temperature

+150

amb

ambient temperature

+75

junction temperature

150

SYMBOL

PARAMETER

CONDITIONS

VALUE

UNIT

th(j-a)

thermal resistance from junction to ambient

in free air

K/W

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

CHARACTERISTICS
V

CCA

= V

CCD

= 5 V; V

CCO

= 3 V; f

pix

= 30 MHz; T

amb

20 to +75

C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

CCA

analog supply voltage

4.75

5.25

CCD

digital supply voltage

4.75

5.25

CCO

digital output supply voltage

2.5

5.25

CCA

analog supply current

with internal regulator

CCD

digital supply current

with internal regulator

CCO

digital output supply current

pix

= 30 MHz; C

= 10 pF on

all data outputs; ramp input

Digital inputs

LOCK INPUT

CLKADC (

REFERENCED TO

DGND)

LOW-level input voltage

0.8

HIGH-level input voltage

2.0

CCD

LOW-level input current

CLKADC

= 0.8 V

HIGH-level input current

CLKADC

= 2.0 V

input impedance

input capacitance

ONTROL INPUTS

PINS

SEN, SCLK, SDATA, STDBY, CLPOB, CLPADC

AND

REGEN

LOW-level input voltage

0.8

HIGH-level input voltage

2.0

CCD

input current

AMPLE AND HOLD INPUTS

PINS

SHP

AND

SHD

LOW-level input voltage

0.8

HIGH-level input voltage

2.0

CCD

input current

+10

Clamp and Track/Hold (CTH) circuit: pins IN, SHD and SHP

i(IN)(p-p)

CTH input voltage
(peak-to-peak value)

i(IN)

input current

W(SHP)

SHP pulse width

i(IN)

= 1000 mV;

transition (99%) in 1 pixel;
code f

co(CTH)

= 0000;

see Fig.5

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

W(SHD)

SHD pulse width

i(IN)

= 1000 mV;

transition (99%) in 1 pixel;
code f

co(CTH)

= 0000;

see Fig.5

code f

co(CTH)

0000

0001

0010

0100

1000

1111

h(IN-SHP)

CTH input hold time compared
to control pulse SHP

see Fig.5

h(IN-SHD)

CTH input hold time compared
to control pulse SHD

see Fig.5

Programmable Gain Amplifier (PGA) output: pin PGAOUT

PGAOUT(p-p)

PGA output amplifier dynamic
voltage level
(peak-to-peak value)

2000

PGAOUT(b)

PGA output amplifier black
level voltage

code C

(CLP)

= 0

1.475

PGAOUT

PGA output amplifier output
impedance

pix

at 10 kHz for minimum

and maximum values

PGAOUT

PGA output current drive

static

PGA(min)

minimum gain of PGA circuit

code G

PGA

= 0

PGA(max)

maximum gain of PGA circuit

code G

PGA

767

Analog-to-Digital Converter (ADC)

pix(max)

maximum pixel frequency

MHz

W(CLKADC)H

CLKADC pulse width HIGH

i(IN)

= 1000 mV;

transition (99.5%) in 1 pixel;
code f

co(CTH)

= 0000;

code G

PGA

= 128; see Fig.5

W(CLKADC)L

CLKADC pulse width LOW

i(IN)

= 1000 mV;

transition (99.5%) in 1 pixel;
code f

co(CTH)

= 0000;

code G

PGA

= 128

CLKADC

CLKADC input slew rate

rising and falling edges;
10% to 90%

0.5

V/ns

i(ADCIN)(p-p)

ADC input voltage
(peak-to-peak value)

with internal regulator

i(ADCIN)

ADC input current

+120

ADC reference voltage bottom

1.30

ADC reference voltage top

3.65

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

Note

1. Noise and clamp behaviour are not guaranteed for a PGA gain higher than 30 dB.

DNL

differential non linearity

ramp input

0.5

0.9

LSB

d(s)

sampling delay

see Fig.5

Total chain characteristics (CTH + PGA + ADC)

d(SHD-CLKADC)

delay between
SHD and CLKADC

i(IN)

= 1000 mV;

transition (99%) in 1 pixel;
code f

co(CTH)

= 0000;

code G

PGA

= 128; see Fig.5

h(SHD-CLKADC)

SHD hold time compared to
CLKADC

i(IN)

= 32 mV;

transition (99%) in 1 pixel;
code f

co(CTH)

= 0000;

code G

PGA

= 767; see Fig.5

tot(rms)

total noise from CTH input to
ADC output (RMS value)

PGA

= 0 dB;

code f

co(CTH)

= 0000

0.85

LSB

PGA

= 30 dB;

code f

co(CTH)

= 0000; note 1

LSB

CCD(max)

maximum offset voltage
between CCD floating level
and CCD dark pixel level

see Fig.11

200

+200

n(i)(eq)(rms)

equivalent input noise
(RMS value)

PGA

= 30 dB;

code f

co(CTH)

= 0000; note 1

Digital outputs (f

pix

= 30 MHz; C

= 10 pF)

HIGH-level output voltage

1 mA

CCO

0.5

CCO

LOW-level output voltage

= 1 mA

0.5

h(o)

output hold time

see Fig.5

d(o)

output delay

CCO

= 5.25 V

CCO

= 3 V

CCO

= 2.5 V

Serial interface

SCLK(max)

maximum clock frequency of
serial interface

MHz

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

handbook, full pagewidth

PGA GAIN

LATCHES

FREQUENCY

LATCHES

LATCH

SELECTION

SD0

LSB

MSB

SDATA

SCLK

SEN

10-bit LSB

ADC clamp

FCE709

PGA control

frequency

control CTH

edge control

clocks

SD1 SD2 SD3 SD4 SD5

SD6

SHIFT REGISTER

SD7 SD8 SD9 A0

(SD0 to SD9)

(SD0 to SD3)

(SD0 to SD2)

(SD0 to SD9)

EDGE

CONTROL

LATCHES

CLAMP

ADC

LATCHES

Fig.3 Serial interface block diagram.

handbook, full pagewidth

MGU158

SDATA

SCLK

SEN

SD9

SD7

SD6

SD5

SD4

SD3

MSB

LSB

SD2

SD1

SD0

th2

tsu3

tsu1

th1

tsu2

SD8

Fig.4 Loading sequence of control DACs input data via the serial interface.

su1

= t

su2

= t

su3

= 4 ns (minimum);

= t

= 4 ns (minimum).

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

Table 1

Serial interface programming

Notes

1. PGA gain register must always be refreshed after clamp code register content has been changed.

2. When pin CLPADC = HIGH (SD1 = 1; serial interface), the ADC input is clamped to the voltage level of V

ref

. Pin V

ref

is connected to ground via a capacitor.

When the power supplies increase from zero to V

, the init-on-power block initializes the circuit as follows:

Cut-off frequency of the CTH circuit is set to: code f

co(CTH)

= 0

PGA gain control is set to: code G

PGA

= 0

Clamp code of the ADC is set to: code ADC

CLP

= 0

SHP and SHD sample on HIGH level; CLKADC activated with rising edge

CLPOB and CLPADC activated on HIGH level.

Table 2

Standby selection

Note

1. In case an external regulator is used, it has to be switched off in standby mode in order to avoid an extra power

consumption of the TDA9965.

ADDRESS BITS

SDATA BITS SD0 to SD9

clamp reference of ADC (SD0 to SD9), note 1

cut-off frequency of CTH (SD0 to SD3)

PGA gain control (SD0 to SD9)

edge control for pulses SHP, SHD, CLPOB, CLPADC and CLKADC (note 2):

SD0 = 1, SHP and SHD sample on LOW level

SD1 = 1, CLPADC and CLPOB activated on HIGH level

SD2 = 1, CLKADC activated with rising edge

PIN STDBY

DATA BITS SD9 to SD0

CCA

+ I

CCD

HIGH

logic 0

4 mA (typical); note 1

LOW

active

84 mA (typical)

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

APPLICATION DIAGRAM

handbook, full pagewidth

MGU195

5.0 V

(2)

TDA9965

OGND2

VCCO2

OGND1

VCCO1

AGND4

AGND5

STGE

AGND1

VCCA1

VCCA2

Vref

n.c.

CCD2

SHD

SHP

CLPOB

CLPADC

CLKADC

CCD1

D11

D10

DGND2

DGND1

STDBY

AGND2

PGAOUT

ADCIN

DEC

REF32

CCA3

AGND3

SEN

SDATA

REGEN

SCLK

from timing

generator

serial

interface

5.0 V

CCD

(2)

5.0 V

(2)

33 pF

47 nF

100 nF

(2)

(3)

5.0 V

(2)

(1)

1 nF

2.2

Fig.12 Application diagram.

(1) The clamp level of the signal input at pin ADCIN can be tuned from code 0 to code 1023 in one LSB step of the ADC via the serial interface (clamp

ADC activated).

(2) All supply pins must be decoupled with 100 nF capacitors as closely as possible to the device.

(3) The capacitors on pins STGE and V

ref

have typical values, performing a typical device start-up time of 300

s from standby to active (supplies on).

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

handbook, full pagewidth

5.0 V

(2)

TDA9965

OGND2

VCCO2

OGND1

VCCO1

AGND4

AGND5

STGE

AGND1

VCCA1

VCCA2

Vref

n.c.

CCD2

SHD

SHP

CLPOB

CLPADC

CLKADC

CCD1

D11

D10

DGND2

DGND1

STDBY

AGND2

PGAOUT

ADCIN

DEC

REF32

CCA3

AGND3

SEN

SDATA

REGEN

SCLK

from timing

generator

serial

interface

5.0 V

CCD1

(2)

5.0 V

(2)

33 pF

47 nF

100 nF

(2)

(3)

5.0 V

(2)

(1)

1 nF

2.2

FCE825

5.0 V

(2)

TDA9965

OGND2

VCCO2

OGND1

VCCO1

AGND4

AGND5

STGE

AGND1

VCCA1

VCCA2

Vref

n.c.

CCD2

SHD

SHP

CLPOB

CLPADC

CLKADC

CCD1

D11

D10

DGND2

DGND1

STDBY

AGND2

PGAOUT

ADCIN

DEC

REF32

CCA3

AGND3

SEN

SDATA

REGEN

SCLK

from timing

generator

serial

interface

5.0 V

CCD2

(2)

5.0 V

(2)

33 pF

47 nF

100 nF

(2)

(3)

5.0 V

(2)

(1)

2.2

Fig.13 Application diagram with 2 CCDs.

For notes (1), (2) and (3) see Fig.12

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

Power and grounding recommendations

Care must be taken to minimize noise when designing a
printed-circuit board for applications such as PC cameras,
surveillance cameras, camcorders and digital still
cameras.

For the front-end integrated circuit, the basic rules of
printed-circuit board design and implementation of analog
components (such as classical operational amplifiers)
must be taken into account, particularly with respect to
power and ground connections.

The connections between CCD interface and CTH input
should be as short as possible and a ground ring
protection around these connections can be beneficial.

Separate analog and digital supplies provide the best
performance. If it is not possible to do this on the board,
then decouple the analog supply pins effectively from the
digital supply pins. The decoupling capacitors must be
placed as close as possible to the IC package.

In a two-ground system, in order to minimize the noise
from package and die parasitics, the following
recommendations must be implemented:

The ground pin associated with the digital outputs must
be connected to the digital ground plane and special
care should be taken to avoid feedthrough in the analog
ground plane. The analog and digital ground planes
must be connected with an inductor as close as possible
to the IC package, in order to have the same DC voltage
on the ground planes.

The digital output pins and their associated lines should
be shielded by the digital ground plane, which can be
used as return path for the digital signals.

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

PACKAGE OUTLINE

UNIT

max.

(1)

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION

ISSUE DATE

IEC

JEDEC

JEITA

1.6

0.20
0.05

1.45
1.35

0.25

0.27
0.17

0.18
0.12

7.1
6.9

0.5

9.15
8.85

0.95
0.55

7
0

0.12

0.1

0.2

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

0.75
0.45

SOT313-2

MS-026

136E05

00-01-19
03-02-25

(1)

7.1
6.9

9.15
8.85

0.95
0.55

Z E

detail X

(A )

2.5

5 mm

scale

pin 1 index

LQFP48: plastic low profile quad flat package; 48 leads; body 7 x 7 x 1.4 mm

SOT313-2

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

SOLDERING

Introduction to soldering surface mount packages

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

"Data Handbook IC26; Integrated Circuit Packages"

(document order number 9398 652 90011).

There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering can still be used for
certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is
recommended.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Driven by legislation and environmental forces the
worldwide use of lead-free solder pastes is increasing.

Several methods exist for reflowing; for example,
convection or convection/infrared heating in a conveyor
type oven. Throughput times (preheating, soldering and
cooling) vary between 100 and 200 seconds depending
on heating method.

Typical reflow peak temperatures range from
215 to 270

C depending on solder paste material. The

top-surface temperature of the packages should
preferably be kept:

below 225

C (SnPb process) or below 245

C (Pb-free

process)

for all BGA, HTSSON-T and SSOP-T packages

for packages with a thickness

2.5 mm

for packages with a thickness < 2.5 mm and a

volume

350 mm

so called thick/large packages.

below 240

C (SnPb process) or below 260

C (Pb-free

process) for packages with a thickness < 2.5 mm and a
volume < 350 mm

so called small/thin packages.

Moisture sensitivity precautions, as indicated on packing,
must be respected at all times.

Wave soldering

Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimal results:

Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

For packages with leads on two sides and a pitch (e):

larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

For packages with leads on four sides, the footprint must
be placed at a 45

angle to the transport direction of the

printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time of the leads in the wave ranges from
3 to 4 seconds at 250

C or 265

C, depending on solder

material applied, SnPb or Pb-free respectively.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

Suitability of surface mount IC packages for wave and reflow soldering methods

Notes

1. For more detailed information on the BGA packages refer to the

"(LF)BGA Application Note" (AN01026); order a copy

from your Philips Semiconductors sales office.

2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

"Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods".

3. These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account

be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature
exceeding 217

C measured in the atmosphere of the reflow oven. The package body peak temperature

must be kept as low as possible.

4. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder

cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side,
the solder might be deposited on the heatsink surface.

5. If wave soldering is considered, then the package must be placed at a 45

angle to the solder wave direction.

The package footprint must incorporate solder thieves downstream and at the side corners.

6. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not

suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

7. Wave soldering is suitable for SSOP, TSSOP, VSO and VSSOP packages with a pitch (e) equal to or larger than

0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

8. Image sensor packages in principle should not be soldered. They are mounted in sockets or delivered pre-mounted

on flex foil. However, the image sensor package can be mounted by the client on a flex foil by using a hot bar
soldering process. The appropriate soldering profile can be provided on request.

9. Hot bar or manual soldering is suitable for PMFP packages.

PACKAGE

(1)

SOLDERING METHOD

WAVE

REFLOW

(2)

BGA, HTSSON..T

(3)

, LBGA, LFBGA, SQFP, SSOP..T

(3)

, TFBGA,

USON, VFBGA

not suitable

suitable

DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON,
HTQFP, HTSSOP, HVQFN, HVSON, SMS

not suitable

(4)

suitable

PLCC

(5)

, SO, SOJ

suitable

LQFP, QFP, TQFP

not recommended

(5)(6)

suitable

SSOP, TSSOP, VSO, VSSOP

not recommended

(7)

suitable

CWQCCN..L

(8)

, PMFP

(9)

, WQCCN..L

(8)

not suitable

2004 Jul 05

Philips Semiconductors

Product specification

12-bit, 5.0 V, 30 Msps analog-to-digital
interface for CCD cameras

TDA9965

DATA SHEET STATUS

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

LEVEL

DATA SHEET

STATUS

(1)

PRODUCT

STATUS

(2)(3)

DEFINITION

Objective data

Development

This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.

Preliminary data Qualification

This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.

III

Product data

Production

This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).

DEFINITIONS

Short-form specification

The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition

Limiting values given are in

accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
at these or at any other conditions above those given in the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information

Applications that are

described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
no representation or warranty that such applications will be
suitable for the specified use without further testing or
modification.

DISCLAIMERS

Life support applications

These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductors customers using or selling these products
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes

Philips Semiconductors

reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status `Production'), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.

SCA76

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Philips Semiconductors a worldwide company

Contact information

For additional information please visit http://www.semiconductors.philips.com.

Fax: +31 40 27 24825

For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.

Printed in The Netherlands

R78/07/pp

Date of release:

2004 Jul 05

Document order number:

9397 750 13311

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA9965

Document Outline

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: TDA9965

Document Outline

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