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Электронный компонент: BH2221FV

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BH2221FV
Standard ICs
1/6
8bit 12ch D/A converter
BH2221FV
BH2221FV is an 8bit D/A converter for electronic adjustment. The 12-channel DC output voltage can be independently
controlled by three-wire serial interface from micro-controller. The D/A converter can generate without loss by Rail-to-Rail
output within the setting voltage. The built-in power ON reset circuit keeps the output state Low after the power is ON and
prevents the unstable output state.
!
!
!
!
Applications
The voltage adjustment for DVC, DSC etc.
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!
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Features
1) 8bit 12-channel D/A converters adopting R-2R system.
2) The full scale output voltage range : 2.7V
5.5V.
3) 3-wire 12-bit serial interface.
4) POWER ON RESET circuit.
5) SSOP-B20 package.
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!
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Absolute maximum ratings (Ta=25
C)
Parameter
Symbol
Limits
Unit
Power supply voltage
V
CC
-
0.3~
+
7.0
V
Maximum output voltage
V
IN
-
0.3~V
CC
V
Storage temperature
Tstg
-
55~
+
125
C
Power dissipation
Pd
400
mW
Reduced by 4mW for each increase in Ta of 1
C over 25
C.
This product is not designed for protection against radioactive rays.
!
!
!
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Recommended operating conditions (Ta=25
C)
Parameter
Symbol
Typ.
Max.
Unit
V
CC
supply voltage
V
CC
-
5.5
V
-
1.0
Analog output source current
I
OL
mA
-
1.0
mA
Analog output sink current
I
OH
-
85
C
Operating temperature range
Topr
-
0.1
Limit load capacitance
Please set to V
CC
V
DD
.
CL
F
Min.
2.7
V
DD
supply voltage
V
DD
-
V
CC
V
2.7
-
-
-
20
-
-
1.0
-
Clock frequency
FSCLK
MHz
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BH2221FV
Standard ICs
2/6
!
!
!
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Block diagram
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
R-2R
DAC
R-2R
DAC
8bitREG
+
DEC
8bitREG
+
DEC
R-2R
DAC
R-2R
DAC
8bitREG
+
DEC
8bitREG
+
DEC
R-2R
DAC
8bitREG
+
DEC
R-2R
DAC
8bitREG
+
DEC
R-2R
DAC
8bitREG
+
DEC
R-2R
DAC
8bitREG
+
DEC
R-2R
DAC
R-2R
DAC
8bitREG
+
DEC
8bitREG
+
DEC
R-2R
DAC
R-2R
DAC
8bitREG
+
DEC
8bitREG
+
DEC
Serial interface
POWER_ON
RESET
V
CC
V
CC
V
DD
V
DD
V
DD
V
DD
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
GND
AO2
AO1
DI
CLK
LD
NC
AO12
AO11
V
CC
NC
AO3
AO4
AO5
AO6
AO7
AO8
AO9
AO10
V
DD
!
!
!
!
Pin descriptions
No connected
No connected
Analog output pins
NC
-
Functions
Pin name
In / Out
AO3
OUT
AO4
OUT
AO5
OUT
AO6
OUT
AO7
OUT
AO8
OUT
AO9
OUT
Power supply pin
Power supply pin
V
CC
V
DD
OUT
AO10
AO12
AO11
-
NC
-
Serial Load input pin
LD
OUT
Serial Clock input pin
CLK
OUT
Serial Data input pin
DI
-
IN
IN
Analog output pins
Analog output pins
AO2
AO1
Common GND pin
1
Pin No.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
GND
IN
OUT
OUT
-
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BH2221FV
Standard ICs
3/6
!
!
!
!
Electrical characteristics (unless otherwise noted, Ta=25
C, V
CC
=3.0V, V
DD
=3.0V, R
L
=OPEN, C
L
=0pF)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
<Operating current
> (
80H set)
V
CC
system
V
DD
system
<Logic interface
>
Input low voltage
Input high voltage
Input low current
Input high current
<Buffer amplifier
>
Minimum output voltage
Maximum output voltage
<DAC accuracy
>
Resolution
Differential nonlinearity error
Nonlinearity error
I
CC
I
DD
V
IL
V
IH
I
IL
I
IH
ZS1
ZS2
ZS3
FS1
FS2
FS3
RES
DNL
INL
-
-
GND
0.8V
CC
-
-
GND
GND
GND
V
CC
-
0.1
V
CC
-
0.2
V
CC
-
0.3
-
-
1.0
-
1.5
0.6
1.0
-
-
-
-
-
-
-
-
-
-
8
-
-
1.5
2.0
0.2V
CC
V
CC
10
10
0.1
0.2
0.3
V
CC
V
CC
V
CC
-
1.0
1.5
mA
mA
V
V
A
A
V
V
V
V
V
V
bit
LSB
LSB
CLK=1MHz
00H set I
OH
=0.0mA
00H set I
OH
=0.5mA
00H set I
OH
=1.0mA
FFH set I
OL
=0.0mA
FFH set I
OL
=0.5mA
FFH set I
OL
=1.0mA
Input code 02H~FDH
Input code 02H~FDH
!
!
!
!
Circuit operation
(1) Power on reset
This LSI has a power on reset circuit that sets an analog output to low level in V
CC
power stand-up.
Please be sure that the time constant meets below condition, because the output is undefined when V
CC
power stand
up too rapidly.
Power on reset voltage
VPOR
V
-
1.9
-
V
CC
=0
2.7V
V
CC
supply voltage rise time
trV
CC
10
ms
-
-
Parameter
Conditions
Symbol
Min.
Typ.
Max.
Unit
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BH2221FV
Standard ICs
4/6
(2) Conditions of operating timing (unless otherwise noted,Ta=25
C, V
CC
=3.0V, V
DD
=3.0V)
Parameter
Conditions
LD hold time
C
L
=50pF, R
L
=10k
CLK L level pulse width
CLK H level pulse width
LD "H" level pulse width
DI setup time
DI hold time
Analog output delay time
LD setup time
Symbol
t
CLKL
t
CLKH
ts
DI
ts
LD
th
DI
th
LD
t
LDH
t
OUT
-
-
-
-
-
-
-
-
-
30
200
200
60
200
100
100
Min.
Typ.
-
-
-
-
-
-
-
300
Max.
Unit
s
ns
ns
ns
ns
ns
ns
ns
CLK
DI
LD
OUTPUT
ts
DI
LAST DATA
th
DI
t
CLKH
t
CLKL
t
LDH
th
LD
ts
LD
t
OUT
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BH2221FV
Standard ICs
5/6
(3) Command sending
Control command is 3wire 12bit serial interface. (MSB first)
Data is taken in with the rise edge of the CLK and output data is fixed in the LD high section.
Data is maintained in the LD low section.
Analog output voltage level
Data set
Channel select
Don't Care
Don't Care
Don't Care
AO11
AO12
AO1
AO2
AO5
AO6
AO7
AO8
AO9
AO10
GND
(V
CC
-GND) / 256
1
(V
CC
-GND) / 256
2
(V
CC
-GND) / 256
3
(V
CC
-GND) / 256
4
(V
CC
-GND) / 256
254
(V
CC
-GND) / 256
255
0
1
0
0
1
0
1
D0
0
0
0
1
1
1
1
D1
D0
LSB (LAST)
Data set
Channel select
MSB (FIRST)
D1
D2
D3
D4
D5
D6
D7
D8
D9
0
0
0
0
1
1
1
D2
0
0
0
0
0
1
1
D3
0
0
0
0
0
1
1
D4
0
0
0
0
0
1
1
D5
0
0
0
0
0
1
1
D6
0
0
0
0
0
1
1
D7
D10
D11
Don't Care
AO3
AO4
Adress select
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
D8
0
0
0
0
0
0
1
1
1
1
1
1
1
0
0
1
D9
0
1
0
0
1
1
0
1
1
0
0
1
1
0
1
0
D10
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
D11

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