Page 1

Rev. 1.0 July 2002

MS18R1622(4/8)DH0

Overview

The SO-RIMM

module is a general purpose high-perfor-

mance memory subsystem suitable for a broad range of
applications including networking systemsnetworking
systems, digital con sumer systems, mobile

Thin and light

PCs, and other applications where high bandwidth and low
latency are required.

The SO-RIMM module consists of 288Mb RDRAM
devices.These are extremely high speed CMOS DRAMs
organized as 16M words by 18 bits. The use of Rambus
Signaling Level(RSL) technology permits up to 1066MHz
transfer rates while using conventional system and board
design technologies. RDRAM devices are capable of
sustained data transfers up to at 0.94ns per two bytes (7.5ns
per 16 bytes)

The RDRAM Architecture enables the highest sustained
bandwidth for multiple, simultaneous, randomly addressed,
memory transactions. The seperate control and data buses
with independent row and column control yield high bus
efficiency. The RDRAM's thirty-two bank architecture
supports up to four simultaneous transactions per device.

Features

High speed of 1066MHz and 800MHz per pin

160 edge connector pads with 0.65mm pad spacing

Maximum module PCB size : 67.6mm x 31.25mm x

1.00mm (2.66

x 1.23

x 0.039

)

Each RDRAM has 32 banks, for a total of 256,128,64

banks on each 288MB,144MB,72MB module respectively

Gold plated edge connector pad contacts

Serial Presence Detect(SPD) support

Operates from a 2.5 volt supply (

�

5%)

Low power and powerdown self refresh modes

Sperate Row and Column buses for heigher efficiency

WBGA lead free package for SoRIMM (92 balls)

Key Timing Parameters/Part Numbers

The following table lists the frequency and latency bins
available for SO-RIMM modules.

Table 1: Part Number by Freq. & Latency

Form Factor

The SO-RIMM modules are offered in 160-pad 0.65mm
edge connector pad pitch form factor suitable for 160 contact
SO-RIMM connectors. Figure 1 below, shows a eight device
SO-RIMM module.

Organization

Speed

Part Number

Bin

I/O

Freq.

(MHz)

rac

(Row

Access

Time) ns

32M x 18

-CT9

1066

32P

MS18R1622DH0-CT9

-CN9

1066

MS18R1622DH0-CN9

-CM9

1066

MS18R1622DH0-CM9

-CM8

800

MS18R1622DH0-CM8

-CK8

800

MS18R1622DH0-CK8

64M x 18

-CT9

1066

32P

MS18R1624DH0-CT9

-CN9

1066

MS18R1624DH0-CN9

-CM9

1066

MS18R1624DH0-CM9

-CM8

800

MS18R1624DH0-CM8

-CK8

800

MS18R1624DH0-CK8

128M x 18

-CT9

1066

32P

MS18R1628DH0-CT9

-CN9

1066

MS18R1628DH0-CN9

-CM9

1066

MS18R1628DH0-CM9

-CM8

800

MS18R1628DH0-CM8

-CK8

800

MS18R1628DH0-CK8

Figure 1: SO-RIMM Module shown with heat spreader removed

Note: On double sided modules, RDRAMs are also installed on bottom side of PCB.

(

16Mx18)*2(4/8)pcs SO-RIMM based on 288Mb D-die, 32s banks,16K/32ms Refresh, 2.5V

Page 2

Rev. 1.0 July 2002

MS18R1622(4/8)DH0

Table 2: Module Pad Numbers and Signal Names

Pin

Pin Name

Pin

Pin Name

Pin

Pin Name

Pin

Pin Name

Gnd

A41

B41

LDQA8

LDQA7

A42

Vref

B42

Vref

Gnd

A43

SCL

B43

SA0

LDQA6

LDQA5

A44

Vdd

B44

Vdd

Gnd

A45

SDA

B45

SA1

LDQA4

LDQA3

A46

Vdd

B46

Vdd

Gnd

A47

SVdd

B47

SWP

LDQA2

LDQA1

A48

Gnd

B48

Gnd

A49

RSCK

B49

RCMD

A10

LDQA0

B10

LCFM

A50

Gnd

B50

Gnd

A11

Gnd

B11

Gnd

A51

RDQB8

B51

RDQB6

A12

LCTM

B12

LCFMN

A52

Gnd

B52

Gnd

A13

Gnd

B13

Gnd

A53

RDQB7

B53

RDQB4

A14

LCTMN

B14

LROW2

A54

Gnd

B54

Gnd

A15

Gnd

B15

Gnd

A55

RDQB5

B55

RDQB2

A16

LROW1

B16

LROW0

A56

Gnd

B56

Gnd

A17

Gnd

B17

Gnd

A57

RDQB3

B57

RDQB0

A18

LCOL4

B18

LCOL3

A58

Gnd

B58

Gnd

A19

Gnd

B19

Gnd

A59

RDQB1

B59

RCOL0

A20

LCOL2

B20

LCOL1

A60

Gnd

B60

Gnd

A21

Gnd

B21

Gnd

A61

RCOL1

B61

RCOL2

A22

LCOL0

B22

LDQB1

A62

Gnd

B62

Gnd

A23

Gnd

B23

Gnd

A63

RCOL3

B63

RCOL4

A24

LDQB0

B24

LDQB3

A64

Gnd

B64

Gnd

A25

Gnd

B25

Gnd

A65

RROW0

B65

RROW1

A26

LDQB2

B26

LDQB5

A66

Gnd

B66

Gnd

A27

Gnd

B27

Gnd

A67

RROW2

B67

RCTMN

A28

LDQB4

B28

LDQB7

A68

Gnd

B68

Gnd

A29

Gnd

B29

Gnd

A69

RCFMN

B69

RCTM

A30

LDQB6

B30

LDQB8

A70

Gnd

B70

Gnd

A31

Gnd

B31

Gnd

A71

RCFM

B71

RDQA0

A32

LSCK

B32

LCMD

A72

Gnd

B72

Gnd

A33

Gnd

B33

Gnd

A73

RDQA1

B73

RDQA2

A34

SOUT

B34

SIN

A74

Gnd

B74

Gnd

A35

Vdd

B35

Vdd

A75

RDQA3

B75

RDQA4

A36

B36

A76

Gnd

B76

Gnd

A37

Gnd

B37

Gnd

A77

RDQA5

B77

RDQA6

A38

B38

A78

Gnd

B78

Gnd

A39

Vcmos

B39

Vcmos

A79

RDQA7

B79

RDQA8

A40

B40

A80

Gnd

B80

Gnd

Page 3

Rev. 1.0 July 2002

MS18R1622(4/8)DH0

Signal

Pins

I/O

Type

Description

Gnd

A1, A3, A5, A7, A9, A11, A13, A15,
A17, A19, A21, A23, A25, A27, A29,
A31, A33, A37, A48, A50, A52, A54,
A56, A58, A60, A62, A64, A66, A68,
A70, A72, A74, A76, A78, A80,
B1, B3, B5, B7, B9, B11, B13, B15,
B17, B19, B21, B23, B25, B27, B29,
B31, B33, B37, B48, B50, B52, B54,
B56, B58, B60, B62, B64, B66, B68,
B70, B72, B74, B76, B78, B80

Ground reference for RDRAM core and interface. 72 pins.

LCFM

B10

RSL

Clock from master. Interface clock used for receiving RSL
signals from the Channel. Positive polarity.

LCFMN

B12

RSL

Clock from master. Interface clock used for receiving RSL
signals from the Channel. Negative polarity.

LCMD

B32

CMOS

Serial Command Pin. Pin used to read from and write to the
control registers. Also used for power management.

LCOL4..
LCOL0

A18, B18, A20, B20, A22

RSL

Column bus. 5-bit bus containing control and address infor-
mation for column accesses.

LCTM

A12

RSL

Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Positive polarity.

LCTMN

A14

RSL

Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Negative polarity.

LDQA8..
LDQA0

A2, B2, A4, B4, A6, B6, A8, B8, A10

I/O

RSL

Data bus A. A 9-bit bus carrying a byte of read or write data
between the Channel and the RDRAM. LDQA8 is non-func-
tional on modules with x16 RDRAM devices

LDQB8..
LDQB0

B30, B28, A30, B26, A28, B24, A26,
B22, A24

I/O

RSL

Data bus B. A 9-bit bus carrying a byte of read or write data
between the Channel and the RDRAM. LDQB8 is non-func-
tional on modules with x16 RDRAM devices.

LROW2..
LROW0

B14, A16, B16

RSL

Row bus. 3-bit bus containing control and address information
for row accesses.

LSCK

A32

CMOS

Serial Clock input. Clock source used to read from and write
to the RDRAM control registers.

A36, B36, A38, B38, A40, B40, A41,
B41

These pads are not connected. These 24 connector pads are
reserved for future use.

RCFM

A71

RSL

Clock from master. Interface clock used for receiving RSL
signals from the Channel. Positive polarity.

RCFMN

A69

RSL

Clock from master. Interface clock used for receiving RSL
signals from the Channel. Negative polarity.

RCMD

B49

CMOS

Serial Command Input. Pin used to read from and write to the
control registers. Also used for power management.

RCOL4..
RCOL0

B63, A63, B61, A61, B59

RSL

Column bus. 5-bit bus containing control and address infor-
mation for column accesses.

Table 3 : Module Connector Pad Description

Page 4

Rev. 1.0 July 2002

MS18R1622(4/8)DH0

RCTM

B69

RSL

Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Positive polarity.

RCTMN

B67

RSL

Clock to master. Interface clock used for transmitting RSL
signals to the Channel. Negative polarity.

RDQA8..
RDQA0

B79, A79, B77, A77, B75, A75, B73,
A73, B71

I/O

RSL

Data bus A. A 9-bit bus carrying a byte of read or write data
between the Channel and the RDRAM. RDQA8 is non-func-
tional on modules x16 RDRAM devices.

RDQB8..
RDQB0

A51, A53, B51, A55, B53, A57, B55,
A59, B57

I/O

RSL

Data bus B. A 9-bit bus carrying a byte of read or write data
between the Channel and the RDRAM. RDQB8 is non-func-
tional on modules x16 RDRAM devices.

RROW2..
RROW0

A67, B65, A65

RSL

Row bus. 3-bit bus containing control and address information
for row accesses.

RSCK

A49

CMOS

Serial Clock input. Clock source used to read from and write
to the RDRAM control registers.

SA0

B43

Serial Presence Detect Address 0.

SA1

B45

Serial Presence Detect Address 1.

SCL

A43

Serial Presence Detect Clock.

SDA

A45

I/O

Serial Presence Detect Data (Open Collector I/O).

SIN

B34

I/O

CMOS

Serial I/O. Pin for reading from and writing to the control reg-
isters. Attaches to SIO0 of the first RDRAM on the module.

SOUT

A34

I/O

CMOS

Serial I/O. Pin for reading from and writing to the control reg-
isters. Attaches to SIO1 of the last RDRAM on the module.

A47

SPD Voltage. Used for signals SCL, SDA, SWE, SA0, SA1
and SA2.

SWP

B47

Serial Presence Detect Write Protect (active high). When low,
the SPD can be written as well as read.

CMOS

A39, B39

CMOS I/O Voltage. Used for signals CMD, SCK, SIN,
SOUT.

Vdd

A35, B35, A44, B44, A46, B46

Supply voltage for the RDRAM core and interface logic.

Vref

A42, B42

Logic threshold reference voltage for RSL signals.

Signal

Pins

I/O

Type

Description

Электронный компонент: MS18R1628DH0