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Электронный компонент: CXG1096FN

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Power Amplifier/Antenna Switch + Low Noise Down Conversion Mixer for PHS
Description
The CXG1096FN is an MMIC consisting of the
power amplifier, diversity antenna supported switch
and low noise down conversion mixer.
This IC is designed using the Sony's GaAs J-FET
process featuring a single positive power supply
operation.
Features
Operates at a single positive power supply: V
DD
= 3V
Diversity antenna supported switch
Small mold package: 26-pin HSOF
<Power amplifier/antenna switch transmitter block >
Low current consumption: I
DD
= 150mA
(P
OUT
= 20.2dBm, f = 1.9GHz)
High power gain: Gp = 40dB Typ.
(P
OUT
= 20.2dBm, f = 1.9GHz)
<Antenna switch receiver block/
low noise down conversion mixer>
Low current consumption: I
DD
= 5.5mA Typ
(When no signal)
High conversion gain: Gc = 19.5dB Typ
(f = 1.9GHz)
Low distortion: Input IP3 = 12dBm Typ. (f = 1.9GHz)
High image compression ratio: IMR = 40dBc Typ.
(f = 1.9GHz)
High 1/2 IF compression ratio: 1/2IFR = 47dBc Typ.
(f = 1.9GHz)
Applications
Japan digital cordless telephones (PHS)
Structure
GaAs J-FET MMIC
Absolute Maximum Ratings
<Power amplifier block>
Supply voltage
V
DD
6
V
Voltage between gate and source
V
GSO
1.5
V
Drain current
I
DD
550
mA
Allowable power dissipation
P
D
3
W
<Switch block>
Control voltage
V
CTL
6
V
<Front-end block>
Supply voltage
V
DD
6
V
Input power
P
RF
+10
dBm
<Common to each block>
Channel temperature
Tch
150
C
Operating temperature
Topr
35 to +85
C
Storage temperature
Tstg
65 to +150
C
1
E99X06-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXG1096FN
26 pin HSOF (Plastic)
Note on Handling
GaAs MMICs are ESD sensitive devices. Special handling precautions are required.
2
CXG1096FN
V
GG
CAP
P
OUT
T
X
V
CTL
1
ANT2
ANT1
GND
GND
V
DD
(RF AMP)
GND
V
DD
(LO AMP)
LO
IN
P
IN
GND
V
DD
1
V
DD
2
V
DD
3
GND
R
X
V
CTL
2
RF
IN
CAP
GND
CAP
IF
OUT
/V
DD
(IF AMP, MIX)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
20
22
23
24
25
26
Pin Configuration
30pF
V
GG
2.2nH
P
IN
18nH
1nF
1nF
V
DD
1
18nH
1nF
30pF
V
DD
2
82nH
1nF
5pF
100pF
1.8nH
10nF
V
DD
3
V
CTL
2
V
DD
(IF AMP, MIX)
100pF
(P
OUT
)
(T
X
)
1pF
100pF
IF
OUT
30pF
100nF
13pF
10pF
10nH
6.8nH
(RF
IN
)
(R
X
)
ANT1
V
DD
(LO AMP)
LO
IN
V
CTL
1
30pF
30pF
2.2nH
3.9nH
V
DD
(RF AMP)
1nF
18pF
1nF
13pF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
20
22
23
24
25
26
ANT2
Block Diagram and External Circuit
3
CXG1096FN
2. Antenna Switch Receiver Block + Low Noise Down Conversion Mixer Block
These specifications are common to the ANT1 reception and ANT2 reception.
Unless otherwise specified: V
DD
= 3V, RF1 = 1.90GHz/35dBm, LO = 1.66GHz/15dBm
When ANT1 reception: V
CTL
1 = 0V, V
CTL
2 = 3V
When ANT2 reception: V
CTL
1 = 3V, V
CTL
2 = 0V
Electrical Characteristics
These specifications are when the Sony's recommended evaluation board shown on page 6 is used.
1. Power Amplifier Block + Antenna Switch Transmitter Block
These specifications are common to the ANT1 transmission and ANT2 transmission.
Unless otherwise specified: V
DD
= 3V, I
DD
= 150mA, P
OUT
= 20.2dBm, f = 1.9GHz
When ANT1 transmission: V
CTL
1 = 3V, V
CTL
2 = 0V
When ANT2 transmission: V
CTL
1 = 0V, V
CTL
2 = 3V
Current consumption
Gate voltage adjustment value
Output power
Power gain
Adjacent channel leak power ratio
(600 100kHz)
Adjacent channel leak power ratio
(900 100kHz)
Occupied bandwidth
2nd-order harmonic level
3rd-order harmonic level
Item
I
DD
V
GG
P
OUT
G
P
ACPR600kHz
ACPR900kHz
OBW
--
--
Symbol
0.04
20.2
36
Min.
150
40
63
70
250
Typ.
0.6
55
60
275
25
25
Max.
mA
V
dBm
dB
dBc
dBc
kHz
dBc
dBc
Unit
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measured with the ANT pin
Measurement conditions
Item
Symbol
Min. Typ. Max. Unit
Measurement conditions
(Ta = 25C)
Current consumption
Conversion gain
Noise figure
Input IP3
Image suppression ratio
1/2 IF suppression ratio
2
LOIF suppression ratio
2
LO+IF suppression ratio
LO to ANT leak
I
DD
G
C
NF
IIP3
IMR
1/2IFR
--
--
P
LK
17
17
25
41
39
34
5.5
19.5
4.4
12
40
47
45
65
50
7.5
5.5
40
mA
dB
dB
dBm
dBc
dBc
dBc
dBc
dBm
When no signal
When a small signal
When a small signal
1
RF2 = 1.42GHz/35dBm
RF2 = 1.78GHz/35dBm
RF2 = 3.08GHz/35dBm
RF2 = 3.56GHz/35dBm
(Ta = 25C)
1
Conversion from IM3 compression ratio during FR1 = 1.9000GHz/35dBm and FR2 = 1.9006GHz/35dBm input.
4
CXG1096FN
Example of Representative Characteristics
1. Power Amplifier + Antenna Switch Transmitter Block (f = 1.9GHz, Ta = 25C)
P
OUT
, ACPR600kHz vs. P
IN
P
IN
Input power [dBm]
P
O
U
T


O
u
t
p
u
t

p
o
w
e
r

[
d
B
m
]
A
C
P
R
6
0
0
k
H
z


A
d
j
a
c
e
n
t

c
h
a
n
n
e
l

l
e
a
k

p
o
w
e
r

r
a
t
i
o

[
d
B
c
]
40
35
30
25
20
15
10
70
65
60
55
50
45
40
5
0
5
10
15
20
25
P
OUT
, ACPR600kHz vs. V
DD
V
DD
Supply voltage [V]
P
O
U
T


O
u
t
p
u
t

p
o
w
e
r

[
d
B
m
]
A
C
P
R
6
0
0
k
H
z


A
d
j
a
c
e
n
t

c
h
a
n
n
e
l

l
e
a
k

p
o
w
e
r

r
a
t
i
o

[
d
B
c
]
2.0
2.5
3.0
3.5
4.0
4.5
5.0
70
65
60
55
50
45
40
17
18
19
20
21
22
P
OUT
23
ACPR600kHz
ACPR600kHz
V
DD
= 3V, V
GG
= const.,
I
DD
= 150mA (@P
OUT
= 20.2dBm),
P
IN
= var.
When ANT1 transmission: V
CTL
1 = 3V, V
CTL
2 = 0V
When ANT2 transmission: V
CTL
1 = 0V, V
CTL
2 = 3V
The data shown below is common to ANT1 and ANT2.
V
DD
= 3V, V
GG
= var., I
DD
= var., P
IN
= var.,
P
OUT
= 20.2dBm
When ANT1 transmission: V
CTL
1 = 3V, V
CTL
2 = 0V
When ANT2 transmission: V
CTL
1 = 0V, V
CTL
2 = 3V
The data shown below is common to ANT1 and ANT2.
V
DD
= var., V
GG
= const.,
I
DD
= 150mA (@V
DD
= 3V, P
OUT
= 20.2dBm),
P
IN
= 19.7dBm
When ANT1 transmission: V
CTL
1 = 3V, V
CTL
2 = 0V
When ANT2 transmission: V
CTL
1 = 0V, V
CTL
2 = 3V
The data shown below is common to ANT1 and ANT2.
Gp, ACPR600kHz vs. I
DD
I
DD
Current consumption [mA]
G
p


P
o
w
e
r

g
a
i
n

[
d
B
]
A
C
P
R
6
0
0
k
H
z


A
d
j
a
c
e
n
t

c
h
a
n
n
e
l

l
e
a
k

p
o
w
e
r

r
a
t
i
o

[
d
B
c
]
100
120
140
160
180
200
220
70
65
60
55
50
45
40
36
37
38
39
40
41
42
G
P
ACPR600kHz
P
OUT
5
CXG1096FN
G
C
, NF vs. P
LO
P
LO
Local input [dBm]
G
C


C
o
n
v
e
r
s
i
o
n

g
a
i
n

[
d
B
]
25
20
15
10
5
0
16
17
18
19
20
21
22
4.00
4.25
4.50
4.75
5.00
5.25
5.50
V
DD
= 3V, RF1 = 1.90GHz/small signal,
LO = 1.66GHz
When ANT1 reception: V
CTL
1 = 0V, V
CTL
2 = 3V
When ANT2 reception: V
CTL
1 = 3V, V
CTL
2 = 0V
The data shown below is common to ANT1 and ANT2.
V
DD
= 3V, RF = 1.90GHz/35dBm,
LO = 1.66GHz
When ANT1 reception: V
CTL
1 = 0V, V
CTL
2 = 3V
When ANT2 reception: V
CTL
1 = 3V, V
CTL
2 = 0V
Input IP3 is common to ANT1 and ANT2.
V
DD
= 3V, RF1 = 1.9000GHz, RF2 = 1.9006GHz,
LO = 1.66GHz/15dBm
When ANT1 reception: V
CTL
1 = 0V, V
CTL
2 = 3V
When ANT2 reception: V
CTL
1 = 3V, V
CTL
2 = 0V
The data shown below is common to ANT1 and ANT2.
P
OUT
, P
IM3
vs. P
IN
P
IN
RF input power [dBm]
P
O
U
T


I
F

o
u
t
p
u
t

p
o
w
e
r
,
P
I
M
3


3
r
d
-
o
r
d
e
r

i
n
t
e
r
m
o
d
u
l
a
t
i
o
n

p
o
w
e
r

[
d
B
m
]
50
40
30
20
10
0
100
80
60
40
20
0
20
Input IP3, P
LK
vs. P
LO
P
LO
Local input [dBm]
I
n
p
u
t

I
P
3

[
d
B
m
]
25
20
15
10
5
0
22
20
18
16
14
12
ANT1
ANT2
10
P
L
K


L
O

t
o

A
N
T

l
e
a
k

l
e
v
e
l

[
d
B
m
]
N
F


N
o
i
s
e

f
i
g
u
r
e

[
d
B
]
60
55
50
45
40
35
30
P
OUT
G
C
NF
P
IM3
Input IP3
Input IP3
2. Antenna Switch Receiver Block + Low Noise Down Conversion Mixer (Ta = 25C)
6
CXG1096FN
Recommended Evaluation Board
V
DD_LO
V
DD_LNA
V
DD_IF
Via Hole
Via Hole
V
CTL
2
V
DD_PA
V
GG
ANT2
LO
IN
ANT1
Glass fabric-base epoxy board (4 layers)
Thickness between layers 1 and 2: 0.2mm
Dimensions: 50mm
50mm
IF
OUT
PA
IN
V
CTL
1
Enlarged Diagram of External Circuit Block
L1 = 1.8nH
L2 = 2.2nH
L3 = 3.9nH
L4 = 6.8nH
L5 = 10nH
L6 = 18nH
L7 = 82nH
C1 = 1pF
C2 = 5pF
C3 = 10pF
C4 = 13pF
C5 = 18pF
C6 = 30pF
C7 = 100pF
C8 = 1nF
C9 = 10nF
C10 = 100nF
C8
C8
C8
C9
L6
L2
L6
L1
L5
L4
C6
C6
L7
C4
C10
C8
C2
C5
C8
C8
C6
C6
C6
C7
C7
C1
L2
L3
C4
C3
C7
7
CXG1096FN
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER PLATING
COPPER ALLOY
PACKAGE STRUCTURE
0.06g
HSOF-26P-01
HSOF 26PIN(PLASTIC)
B
0.4
3
.
8


0
.
0
5
4
.
4


0
.
1
0.07 M
*5.6 0.05
1
13
14
26
A
S A
S
0.9 0.1
0.08
S
(
1
.
5
)

(
0
.
7
)
0
.
5
0.2
4.4
0.2
4.2
5.5
0
.
4
(
1
.
7
5
)
0
.
4
5


0
.
1
5
NOTE: Dimension "
" does not include mold protrusion.
0.14 0.03
DETAILB
0
.
2



0
+

0
.
0
5
(
0
.
2
)
0.2 0.05
Solder Plating
+ 0.05
Package Outline
Unit: mm
Sony corporation