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DATA BRIEFING
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact
your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
ST19SF16
Smartcard MCU
With 16 KBytes EEPROM
s
8 BIT ARCHITECTURE CPU
s
32 KBytes of USER ROM WITH
PARTITIONING
s
SYSTEM ROM FOR LIBRARIES
s
960 Bytes of RAM WITH PARTITIONING
s
16 KBytes of EEPROM WITH PARTITIONING
Highly reliable CMOS EEPROM technology
10 year data retention
100,000 Erase/Write cycle endurance
Separate Write and Erase cycles for fast "1"
programming
1 to 64 bytes Erase or Program in 1 ms
s
SECURITY FIREWALLS FOR MEMORIES
s
VERY HIGH SECURITY FEATURES
INCLUDING EEPROM FLASH PROGRAM
AND RAM FLASH CLEAR
s
8 BIT TIMER
s
SERIAL ACCESS, ISO 7816-3 COMPATIBLE
s
3V
10% or 5V
10% SUPPLY VOLTAGE
s
POWER SAVING STANDBY MODE
s
UP TO 10 MHz INTERNAL OPERATING
FREQUENCY
s
CONTACT ASSIGNMENT COMPATIBLE ISO
7816-2
s
ESD PROTECTION GREATER THAN 5000V
*CRT: Chinese Remainder Theorem
2
2
2
2
Micromodule (D4)
Wafer
BD.SF16/9809VP1
ST19SF16
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HARDWARE DESCRIPTION
The ST19SF16, a member of the ST19 device
family, is a serial access microcontroller especially
designed for very large volume and cost competi-
tive secure portable objects.
The ST19SF16 is based on a STMicroelectronics
8 bit CPU core including on-chip memories: 960
Bytes of RAM, 32 KBytes of USER ROM and 16 K
Bytes of EEPROM.
RAM, ROM and EEPROM memories can be con-
figured into partitions. Access rules from any
memory partition to another partition are setup by
the user defined Memory Access Control Logic.
It is manufactured using the highly reliable ST sub-
micron technology.
As all other ST19 family members, it is fully com-
patible with the ISO standards for Smartcard appli-
cations.
SOFTWARE DEVELOPMENT
Software development and firmware (ROM code/
options) generation are completed by the ST16-19
HDS development system.
Figure 1. Block Diagram
SCP 101b/DS
INTERNAL BUS
RESET
SERIAL
I/O
INTER-
FACE
8 BIT
CPU
8 BIT
TIMER
CLOCK
GENERA-
TOR
MODULE
UNPRE-
DICTABLE
NUMBER
GENERATOR
RAM
EEPROM
USER
ROM
SYSTEM ROM
FIREWALL
MEMORY ACCESS FIREWALL
CLK
I/O
GND
Vcc
SYSTEM ROM
SECURITY
ADMINISTRATOR
960
Bytes
16 K
Bytes
32 K
Bytes
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