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February 2003
STW26NM50
N-CHANNEL 500V - 0.10
- 26A TO-247
Zener-Protected MDmeshTMPower MOSFET
TYPICAL R
DS
(on) = 0.10
HIGH dv/dt AND AVALANCHE CAPABILITIES
IMPROVED ESD CAPABILITY
LOW INPUT CAPACITANCE AND GATE
CHARGE
LOW GATE INPUT RESISTANCE
DESCRIPTION
The MDmeshTM is a new revolutionary MOSFET
technology that associates the Multiple Drain pro-
cess with the Company's PowerMESHTM horizontal
layout. The resulting product has an outstanding low
on-resistance, impressively high dv/dt and excellent
avalanche characteristics. The adoption of the
Company's proprietary strip technique yields overall
dynamic performance that is significantly better than
that of similar competition's products.
APPLICATIONS
The MDmeshTM family is very suitable for increasing
power density of high voltage converters allowing
system miniaturization and higher efficiencies.
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
STW26NM50
500 V
< 0.120
30 A
SALES TYPE
MARKING
PACKAGE
PACKAGING
STW26NM50
W26NM50
TO-247
TUBE
TO-247
INTERNAL SCHEMATIC DIAGRAM
STW26NM50
2/8
ABSOLUTE MAXIMUM RATINGS
( ) Pulse width limited by safe operating area
(1) I
SD
26A, di/dt
200A/s, V
DD
V
(BR)DSS
, T
j
T
JMAX.
THERMAL DATA
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the
usage of external components.
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
500
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
500
V
V
GS
Gate- source Voltage
30
V
I
D
Drain Current (continuous) at T
C
= 25C
30
A
I
D
Drain Current (continuous) at T
C
= 100C
18.9
A
I
DM
( )
Drain Current (pulsed)
120
A
P
TOT
Total Dissipation at T
C
= 25C
313
W
Derating Factor
2.5
W/C
V
ESD(G-S)
Gate source ESD(HBM-C=100pF, R=1.5K
)
6000
V
dv/dt (1)
Peak Diode Recovery voltage slope
15
V/ns
T
j
T
stg
Operating Junction Temperature
Storage Temperature
-55 to 150
C
Rthj-case
Thermal Resistance Junction-case Max
0.4
C/W
Rthj-amb
Thermal Resistance Junction-ambient Max
62.5
C/W
T
l
Maximum Lead Temperature For Soldering Purpose
300
C
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
13
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
740
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igss= 1mA (Open Drain)
30
V
3/8
STW26NM50
ELECTRICAL CHARACTERISTICS (T
CASE
=25C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 250 A, V
GS
= 0
500
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 C
10
100
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250A
3
4
5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 13 A
0.1
0.12
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 15 V
,
I
D
= 13 A
20
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
3000
700
50
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 400V
300
pF
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
r
Turn-on Delay Time
Rise Time
V
DD
= 250 V, I
D
= 13 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
28
25
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 400V, I
D
= 26 A,
V
GS
= 10V
76
20
36
106
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
r(Voff)
t
f
t
c
Off-voltage Rise Time
Fall Time
Cross-over Time
V
DD
= 400V, I
D
= 26 A,
R
G
= 4.7
,
V
GS
= 10V
(Inductive Load see, Figure 5)
13
19
36
ns
ns
ns
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
26
104
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 26 A, V
GS
= 0
1.5
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 26 A, di/dt = 100A/s
V
DD
= 100 V, T
j
= 25C
(see test circuit, Figure 5)
400
5.5
27.8
ns
C
A
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 26 A, di/dt = 100A/s
V
DD
= 100 V, T
j
= 150C
(see test circuit, Figure 5)
492
7
28.8
ns
C
A
STW26NM50
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Safe Operating Area For TO-247
Thermal Impedance For TO-247
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
5/8
STW26NM50
Capacitance Variations
Gate Charge vs Gate-source Voltage
Normalized On Resistance vs Temperature
Normalized Gate Threshold Voltage vs Temp.
Source-drain Diode Forward Characteristics
STW26NM50
6/8
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
7/8
STW26NM50
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
4.85
5.15
0.19
0.20
D
2.20
2.60
0.08
0.10
E
0.40
0.80
0.015
0.03
F
1
1.40
0.04
0.05
F1
3
0.11
F2
2
0.07
F3
2
2.40
0.07
0.09
F4
3
3.40
0.11
0.13
G
10.90
0.43
H
15.45
15.75
0.60
0.62
L
19.85
20.15
0.78
0.79
L1
3.70
4.30
0.14
0.17
L2
18.50
0.72
L3
14.20
14.80
0.56
0.58
L4
34.60
1.36
L5
5.50
0.21
M
2
3
0.07
0.11
V
5
5
V2
60
60
Dia
3.55
3.65
0.14
0.143
TO-247 MECHANICAL DATA
STW26NM50
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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