Электронный компонент: ADS8383

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ADS8383

SLAS005B � DECEMBER 2002 � REVISED MAY 2003

18-BIT, 500-kHz, UNIPOLAR INPUT, MICROPOWER SAMPLING

ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE

FEATURES

D

500-kHz Sample Rate

D

18-Bit NMC Ensured Over Temperature

D

Zero Latency

D

Low Power: 110 mW at 500 kHz

D

Unipolar Input Range

D

Onboard Reference Buffer

D

High-Speed Parallel Interface

D

Wide Digital Supply

D

8-/16-/18-Bit Bus Transfer

D

48-Pin TQFP Package

APPLICATIONS

D

Medical Instruments

D

Optical Networking

D

Transducer Interface

D

High Accuracy Data Acquisition Systems

D

Magnetometers

DESCRIPTION

The ADS8383 is an 18-bit, 500 kHz A/D converter. The
device includes a 18-bit capacitor-based SAR A/D
converter with inherent sample and hold. The ADS8383
offers a full 18-bit interface, a 16-bit option where data is
read using two read cycles or an 8-bit bus option using
three read cycles.

The ADS8383 is available in a 48-lead TQFP package and
is characterized over the industrial �40

�

C to 85

�

C

temperature range.

CDAC

_

+

Output

Latches

and

3-State

Drivers

BUS 18/16

BYTE

18-/16-/8-Bit
Parallel DATA
Output Bus

SAR

Conversion

and

Control Logic

Comparator

Clock

+IN

�IN

REFIN

CONVST

BUSY

CS

RD

PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.

Copyright

2002�2003, Texas Instruments Incorporated

ADS8383

SLAS005B � DECEMBER 2002 � REVISED MAY 2003

www.ti.com

2

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during
storage or handling to prevent electrostatic damage to the MOS gates.

ORDERING INFORMATION

MODEL

MAXIMUM

INTEGRAL

LINEARITY

(LSB)

MAXIMUM

DIFFERENTIAL

LINEARITY

(LSB)

NO

MISSING

CODES

RESOLU-

TION (BIT)

PACKAGE

TYPE

PACKAGE

DESIGNATOR

TEMPER-

ATURE

RANGE

ORDERING

INFORMATION

TRANS-

PORT

MEDIA

QUANTITY

ADS8383I

�

10

2 7

17

48 Pin

PFB

�40

�

C to

ADS8383IPFBT

Tape and

reel 250

ADS8383I

�

10

�2~7

17

48 Pin

TQFP

PFB

�40 C to

85

�

C

ADS8383IPFBR

Tape and
reel 1000

ADS8383IB

�

7

1 2 5

18

48 Pin

PFB

�40

�

C to

ADS8383IBPFBT

Tape and

reel 250

ADS8383IB

�

7

�1~2.5

18

48 Pin

TQFP

PFB

�40 C to

85

�

C

ADS8383IBPFBR

Tape and
reel 1000

NOTE: For the most current specifications and package information, refer to our website at www.ti.com.

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature range unless otherwise noted(1)

UNIT

Voltage

+IN to AGND

+VA + 0.1 V

Voltage

�IN to AGND

0.5 V

+VA to AGND

�0.3 V to 7 V

Voltage range

+VBD to BDGND

�0.3 V to 7 V

Voltage range

+VA to +VBD

�0.3 V to 2.5 V

Digital input voltage to BDGND

�0.3 V to +VBD + 0.3 V

Digital output voltage to BDGND

�0.3 V to +VBD + 0.3 V

Operating free-air temperature range, TA

�40

�

C to 85

�

C

Storage temperature range, Tstg

�65

�

C to 150

�

C

Junction temperature (TJ max)

150

�

C

TQFP package

Power dissipation

(TJMax � TA)/

JA

TQFP package

JA thermal impedance

86

�

C/W

Lead temperature soldering

Vapor phase (60 sec)

215

�

C

Lead temperature, soldering

Infrared (15 sec)

220

�

C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

ADS8383

SLAS005B � DECEMBER 2002 � REVISED MAY 2003

www.ti.com

3

SPECIFICATIONS

TA = �40

�

C to 85

�

C, +VA = 5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 500 kHz (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Analog Input

Full-scale input voltage (see Note 1)

+IN � �IN

0

Vref

V

Absolute input voltage

+IN

�0.2

Vref + 0.2

V

Absolute input voltage

�IN

�0.2

0.2

V

Input capacitance

45

pF

Input leakage current

1

nA

System Performance

Resolution

18

Bits

ADS8383I

(+IN � �IN) < 0.5 FS

18

No missing codes

ADS8383I

(+IN � �IN)

0.5 FS

17

Bits

No missing codes

ADS8383IB

18

Bits

(+IN � �IN) < 0.125 FS

�4

4

Integral linearity (see Notes 2 and 3)

ADS8383I

(+IN � �IN) < 0.5 FS

�6

6

LSB

Integral linearity (see Notes 2 and 3)

ADS8383I

(+IN � �IN)

0.5 FS

�10

10

LSB

(18 bit)

ADS8383IB

�7

�2/3

7

(

)

(+IN � �IN) < 0.125 FS

�1

2

Differentiallinearity

ADS8383I

(+IN � �IN) < 0.5 FS

�1

3

LSB (18 bit)

Differential linearity

ADS8383I

(+IN � �IN)

0.5 FS

�2

7

LSB (18 bit)

ADS8383IB

�1

�1/1.4

2.5

Offset error (see Note 4)

ADS8383I

�1

�

0.5

1

mV

Offset error (see Note 4)

ADS8383IB

�0.75

�

0.25

0.75

mV

Gain error (see Note 4)

ADS8383I

Vref = 4.096 V

�0.1

0.1

%FS

Gain error (see Note 4)

ADS8383IB

Vref = 4.096 V

�0.06

0.06

%FS

Noise

60

�

V RMS

Power supply rejection ratio

At 3FFFFh output code

75

dB

Sampling Dynamics

Conversion time

1.5

�

s

Acquisition time

0.4

�

s

Throughput rate

500

kHz

Aperture delay

4

ns

Aperture jitter

15

ps

Step response

150

ns

Over voltage recovery

150

ns

(1) Ideal input span, does not include gain or offset error.
(2) LSB means least significant bit
(3) This is endpoint INL, not best fit.
(4) Measured relative to an ideal full-scale input (+IN � �IN) of 4.096 V

ADS8383

SLAS005B � DECEMBER 2002 � REVISED MAY 2003

www.ti.com

4

SPECIFICATIONS (CONTINUED)

TA = �40

�

C to 85

�

C, +VA = +5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 500 kHz (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Dynamic Characteristics

ADS8383I

V

4 V

at 1 kHz

�110

ADS8383IB

VIN = 4 Vpp at 1 kHz

�112

ADS8383I

V

4 V

at 10 kHz

�98

Total harmonic distortion (THD)

ADS8383IB

VIN = 4 Vpp at 10 kHz

�108

dB

Total harmonic distortion (THD)
(see Note 1)

ADS8383I

V

4 V

at 50 kHz

�98

dB

(

)

ADS8383IB

VIN = 4 Vpp at 50 kHz

�99

ADS8383I

V

4 V

at 100 kHz

�90

ADS8383IB

VIN = 4 Vpp at 100 kHz

�91

ADS8383I

V

4 V

at 1 kHz

87

ADS8383IB

VIN = 4 Vpp at 1 kHz

88

ADS8383I

V

4 V

at 10 kHz

87

Signal to noise ratio (SNR) (see Note 1)

ADS8383IB

VIN = 4 Vpp at 10 kHz

87

dB

Signal to noise ratio (SNR) (see Note 1)

ADS8383I

V

4 V

at 50 kHz

87

dB

ADS8383IB

VIN = 4 Vpp at 50 kHz

87

ADS8383I

V

4 V

at 100 kHz

87

ADS8383IB

VIN = 4 Vpp at 100 kHz

87

ADS8383I

V

4 V

at 1 kHz

86

ADS8383IB

VIN = 4 Vpp at 1 kHz

87

ADS8383I

V

4 V

at 10 kHz

86

Signal to noise + distortion (SINAD)

ADS8383IB

VIN = 4 Vpp at 10 kHz

86

dB

Signal to noise + distortion (SINAD)
(see Note 1)

ADS8383I

V

4 V

at 50 kHz

86

dB

(

)

ADS8383IB

VIN = 4 Vpp at 50 kHz

86

ADS8383I

V

4 V

at 100 kHz

85

ADS8383IB

VIN = 4 Vpp at 100 kHz

85

ADS8383I

V

4 V

at 1 kHz

110

ADS8383IB

VIN = 4 Vpp at 1 kHz

112

ADS8383I

V

4 V

at 10 kHz

98

Spurious free dynamic range (SFDR)

ADS8383IB

VIN = 4 Vpp at 10 kHz

108

dB

S urious free dynamic range (SFDR)
(see Note 1)

ADS8383I

V

4 V

at 50 kHz

98

dB

(

)

ADS8383IB

VIN = 4 Vpp at 50 kHz

98

ADS8383I

V

4 V

at 100 kHz

90

ADS8383IB

VIN = 4 Vpp at 100 kHz

94

�3dB Small signal bandwidth

3

MHz

Voltage Reference Input

Reference voltage at REFIN, Vref

2.5

4.096

4.2

V

Reference resistance (see Note 2)

500

k

Reference current drain

fs = 500 kHz

1

mA

Bias Input

Bias input range

2

2.048

2.1

V

Bias input drift

�

5

%FS

Bias input current, sink

�150

�100

�

A

(1) Calculated on the first nine harmonics of the input frequency
(2) Can vary

�

20%

ADS8383

SLAS005B � DECEMBER 2002 � REVISED MAY 2003

www.ti.com

5

SPECIFICATIONS (CONTINUED)

TA = �40

�

C to 85

�

C, +VA = +5 V, +VBD = 3 V or 5 V, Vref = 4.096 V, fSAMPLE = 500 kHz (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Digital Input/Output

Logic family

CMOS

VIH

IIH = 5

�

A

+VBD�1

+VBD + 0.3

Logic level

VIL

IIL = 5

�

A

�0.3

0.8

V

Logic level

VOH

IOH = 2 TTL loads

+VBD � 0.6

V

VOL

IOL = 2 TTL loads

0.4

Data format

Straight

Binary

Power Supply Requirements

Power supply voltage

+VBD (see Notes 1 and 2)

2.95

3.3

5.25

V

Power supply voltage

+VA (see Note 2)

4.75

5

5.25

V

Supply current, 500-kHz sample rate (see Note 3)

22

26

mA

Power dissipation, 500-kHz sample rate (see Note 3)

110

130

mW

Temperature Range

Operating free-air

�40

85

�

C

(1) The difference between +VA and +VBD should be no less than 2.3 V, i.e. if +VA is 5.5 V, +VBD should be at least 2.95 V.
(2) +VBD

+VA � 2.3 V

(3) This includes only +VA current. +VBD current is typical 1 mA with 5 pF load capacitance on all output pins.

Document Outline

• FEATURES
• APPLICATIONS
• DESCRIPTION
• ORDERING INFORMATION
• ABSOLUTE MAXIMUM RATINGS
• SPECIFICATIONS
• TIMING CHARACTERISTICS
• PIN ASSIGNMENTS
• TERMINAL FUNCTIONS
• TIMING DIAGRAMS
• TYPICAL CHARACTERISTICS
• APPLICATION INFORMATION
  • MICROCONTROLLER INTERFACING
    • ADS8383 to 8-Bit Microcontroller Interface
• PRINCIPLES OF OPERATION
  • REFERENCE
  • BIASING THE ADS8383
  • ANALOG INPUT
  • DIGITAL INTERFACE
    • Timing And Control
    • Reading Data
  • POWER-ON INITIALIZATION
  • LAYOUT
• IMPORTANT NOTICE