SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D SEPTEMBER 1994 REVISED JANUARY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Inputs Are TTL-Voltage Compatible
D
EPIC
TM
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
D
Package Options Include Plastic
Small-Outline (DW) Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. The control-function implementation
minimizes external timing requirements.
When the output-enable (OE) is low, the device
passes noninverted data from the A bus to the B
bus or from the B bus to the A bus, depending
upon the logic level at the direction-control (DIR)
input. A high on
OE
disables the device so that the
buses are effectively isolated.
The SN54ACT245 is characterized for operation
over the full military temperature range of 55
C
to 125
C. The SN74ACT245 is characterized for
operation from 40
C to 85
C.
FUNCTION TABLE
(each transceiver)
INPUTS
OPERATION
OE
DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Copyright
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
EPIC is a trademark of Texas Instruments Incorporated.
SN54ACT245 . . . J OR W PACKAGE
SN74ACT245 . . . DB, DW, N, OR PW PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
SN54ACT245 . . . FK PACKAGE
(TOP VIEW)
A2
A1
DIR
B7
B6
OE
A8
GND
B8
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D SEPTEMBER 1994 REVISED JANUARY 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic symbol
A5
6
A6
7
A7
8
A8
9
A2
3
A3
4
A4
5
OE
A1
2
G3
19
3EN2[AB]
B5
14
B6
13
B7
12
B8
11
B1
18
B2
17
B3
16
B4
15
3EN1[BA]
1
DIR
1
2
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
logic diagram (positive logic)
DIR
OE
A1
B1
To Seven Other Channels
1
2
19
18
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1)
0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
)
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
(V
O
= 0 to V
CC
)
50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
200 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): DB package
70
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package
58
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
69
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
83
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51.
SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D SEPTEMBER 1994 REVISED JANUARY 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54ACT245
SN74ACT245
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
4.5
5.5
4.5
5.5
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
VI
Input voltage
0
VCC
0
VCC
V
VO
Output voltage
0
VCC
0
VCC
V
IOH
High-level output current
24
24
mA
IOL
Low-level output current
24
24
mA
D
t/
D
v
Input transition rise or fall rate
0
8
0
8
ns/V
TA
Operating free-air temperature
55
125
40
85
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
C
SN54ACT245
SN74ACT245
UNIT
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
IOH = 50
m
A
4.5 V
4.4
4.49
4.4
4.4
IOH = 50
m
A
5.5 V
5.4
5.49
5.4
5.4
VOH
IOH = 24 mA
4.5 V
3.88
3.7
3.76
V
VOH
IOH = 24 mA
5.5 V
4.86
4.7
4.76
V
IOH = 50 mA
5.5 V
3.85
IOH = 75 mA
5.5 V
3.85
IOL = 50
m
A
4.5 V
0.001
0.1
0.1
0.1
IOL = 50
m
A
5.5 V
0.001
0.1
0.1
0.1
VOL
IOL = 24 mA
4.5 V
0.36
0.5
0.44
V
VOL
IOL = 24 mA
5.5 V
0.36
0.5
0.44
V
IOL = 50 mA
5.5 V
1.65
IOL = 75 mA
5.5 V
1.65
IOZ
A or B ports
VO = VCC or GND
5.5 V
0.5
10
5
m
A
II
OE or DIR
VI = VCC or GND
5.5 V
0.1
1
1
m
A
ICC
VI = VCC or GND,
IO = 0
5.5 V
4
80
40
m
A
D
ICC
One input at 3.4 V,
Other inputs at GND or VCC
5.5 V
0.6
1.6
1.5
mA
Ci
VI = VCC or GND
5 V
4.5
pF
Cio
VO = VCC or GND
5 V
15
pF
Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms.
For I/O ports, the parameter IOZ includes the input leakage current.
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
SN54ACT245, SN74ACT245
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS452D SEPTEMBER 1994 REVISED JANUARY 2000
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V
0.5 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
TA = 25
C
SN54ACT245
SN74ACT245
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNIT
tPLH
A or B
B or A
1
4
7.5
1
9
1.5
8
ns
tPHL
A or B
B or A
1
4
8
1
10
1
9
ns
tPZH
OE
A or B
1
5
10
1
12
1.5
11
ns
tPZL
OE
A or B
1
5.5
10
1
13
1.5
12
ns
tPHZ
OE
A or B
1
5.5
10
1
12
1
11
ns
tPLZ
OE
A or B
1
5
10
1
12
1.5
11
ns
operating characteristics, V
CC
= 5 V, T
A
= 25
C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Cpd
Power dissipation capacitance
CL = 50 pF,
f = 1 MHz
45
pF
PARAMETER MEASUREMENT INFORMATION
LOAD CIRCUIT
tPLH
tPHL
3 V
0 V
50% VCC
50% VCC
VOH
VOL
Input
Output
VOLTAGE WAVEFORMS
From Output
Under Test
CL = 50 pF
(see Note A)
S1
2
VCC
500
500
Open
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCC
Open
TEST
S1
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 2
VCC
(see Note B)
Output
Waveform 2
S1 at Open
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
50% VCC
VOL + 0.3 V
50% VCC
0 V
VOLTAGE WAVEFORMS
VOH 0.3 V
3 V
1.5 V
1.5 V
1.5 V
1.5 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
1 MHz, ZO = 50
, tr
2.5 ns, tf
2.5 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright
2000, Texas Instruments Incorporated
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