SN754410
QUADRUPLE HALF-H DRIVER
SLRS007B NOVEMBER 1986 REVISED NOVEMBER 1995
Copyright
1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
1-A Output-Current Capability Per Driver
Applications Include Half-H and Full-H
Solenoid Drivers and Motor Drivers
Designed for Positive-Supply Applications
Wide Supply-Voltage Range of 4.5 V to 36 V
TTL- and CMOS-Compatible
High-Impedance Diode-Clamped Inputs
Separate Input-Logic Supply
Thermal Shutdown
Internal ESD Protection
Input Hysteresis Improves Noise Immunity
3-State Outputs
Minimized Power Dissipation
Sink/Source Interlock Circuitry Prevents
Simultaneous Conduction
No Output Glitch During Power Up or
Power Down
Improved Functional Replacement for the
SGS L293
description
The SN754410 is a quadruple high-current half-H
driver designed to provide bidirectional drive
currents up to 1 A at voltages from 4.5 V to 36 V.
The device is designed to drive inductive loads
such as relays, solenoids, dc and bipolar stepping
motors, as well as other high-current/high-voltage
loads in positive-supply applications.
All inputs are compatible with TTL-and low-level CMOS logic. Each output (Y) is a complete totem-pole driver
with a Darlington transistor sink and a pseudo-Darlington source. Drivers are enabled in pairs with drivers 1 and
2 enabled by 1,2EN and drivers 3 and 4 enabled by 3,4EN. When an enable input is high, the associated drivers
are enabled and their outputs become active and in phase with their inputs. When the enable input is low, those
drivers are disabled and their outputs are off and in a high-impedance state. With the proper data inputs, each
pair of drivers form a full-H (or bridge) reversible drive suitable for solenoid or motor applications.
A separate supply voltage (V
CC1
) is provided for the logic input circuits to minimize device power dissipation.
Supply voltage V
CC2
is used for the output circuits.
The SN754410 is designed for operation from 40
C to 85
C.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1,2EN
1A
1Y
2Y
2A
V
CC2
V
CC1
4A
4Y
HEAT SINK AND
GROUND
3Y
3A
3,4EN
HEAT SINK AND
GROUND
A
H
L
X
EN
H
H
L
Y
H
L
Z
INPUTS
OUTPUT
FUNCTION TABLE
(each driver)
H = high-level, L = low-level
X = irrelevant
Z = high-impedance (off)
In the thermal shutdown
mode, the output is in a high-
impedance state regardless
of the input levels.
NE PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
SN754410
QUADRUPLE HALF-H DRIVER
SLRS007B NOVEMBER 1986 REVISED NOVEMBER 1995
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
logic symbol
logic diagram
EN
EN
EN
EN
4A
3, 4EN
3A
2A
1,2EN
1A
15
9
10
7
1
2
4Y
3Y
2Y
1Y
14
11
6
3
4A
3, 4EN
3A
2A
1, 2EN
1A
15
9
10
7
1
2
4Y
3Y
2Y
1Y
14
11
6
3
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
schematics of inputs and outputs
Output
VCC1
EQUIVALENT OF EACH INPUT
Current
Source
Input
GND
TYPICAL OF ALL OUTPUTS
VCC2
GND
SN754410
QUADRUPLE HALF-H DRIVER
SLRS007B NOVEMBER 1986 REVISED NOVEMBER 1995
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Output supply voltage range, V
CC1
(see Note 1)
0.5 V to 36 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output supply voltage range, V
CC2
0.5 V to 36 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
36 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
3 V to V
CC2
+ 3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current (nonrepetitive, t
w
5 ms)
2 A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
1.1 A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation at (or below) 25
C free-air temperature (see Note 2)
2075 mW
. . . . . . . .
Operating free-air temperature range, T
A
40
C to 85
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
J
40
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. All voltage values are with respect to network GND.
2. For operation above 25
C free-air temperature, derate linearly at the rate of 16.6 mW/
C. To avoid exceeding the design maximum
virtual junction temperature, these ratings should not be exceeded. Due to variations in individual device electrical characteristics
and thermal resistance, the built-in thermal overload protection can be activated at power levels slightly above or below the rated
dissipation.
recommended operating conditions
MIN
MAX
UNIT
Output supply voltage, VCC1
4.5
5.5
V
Output supply voltage, VCC2
4.5
36
V
High-level input voltage, VIH
2
5.5
V
Low-level input voltage, VIL
0.3
0.8
V
Operating virtual junction temperature, TJ
40
125
C
Operating free-air temperature, TA
40
85
C
The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet for logic voltage
levels.
SN754410
QUADRUPLE HALF-H DRIVER
SLRS007B NOVEMBER 1986 REVISED NOVEMBER 1995
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
electrical characteristics over recommended ranges of supply voltage and free-air temperature
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIK
Input clamp voltage
II = 12 mA
0.9
1.5
V
IOH = 0.5 A
VCC2 1.5 VCC2 1.1
VOH
High-level output voltage
IOH = 1 A
VCC2 2
V
IOH = 1 A,
TJ = 25
C
VCC2 1.8 VCC2 1.4
IOL = 0.5 A
1
1.4
VOL
Low-level output voltage
IOL = 1 A
2
V
IOL = 1 A,
TJ = 25
C
1.2
1.8
VO
High level output clamp voltage
IOK = 0.5 A
VCC2 + 1.4
VCC2 + 2
V
VOKH
High-level output clamp voltage
IOK = 1 A
VCC2 + 1.9 VCC2 + 2.5
V
VO
Low level output clamp voltage
IOK = 0.5 A
1.1
2
V
VOKL
Low-level output clamp voltage
IOK = 1 A
1.3
2.5
V
IOZ( ff)
Off-state high-impedance-state
VO = VCC2
500
A
IOZ(off)
g
output current
VO = 0
500
A
IIH
High-level input current
VI = 5.5 V
10
A
IIL
Low-level input current
VI = 0
10
A
All outputs at high level
38
ICC1
Output supply current
IO = 0
All outputs at low level
70
mA
All outputs at high impedance
25
All outputs at high level
33
ICC2
Output supply current
IO = 0
All outputs at low level
20
mA
All outputs at high impedance
5
All typical values are at VCC1 = 5 V, VCC2 = 24 V, TA = 25
C.
switching characteristics, V
CC1
= 5 V, V
CC2
= 24 V, C
L
= 30 pF, T
A
= 25
C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
td1
Delay time, high-to-low-level output from A input
400
ns
td2
Delay time, low-to-high-level output from A input
800
ns
tTLH
Transition time, low-to-high-level output
300
ns
tTHL
Transition time, high-to-low-level output
See Figure 1
300
ns
tr
Rise time, pulse input
tf
Fall time, pulse input
tw
Pulse duration
ten1
Enable time to the high level
700
ns
ten2
Enable time to the low level
See Figure 2
400
ns
tdis1
Disable time from the high level
See Figure 2
900
ns
tdis2
Disable time from the low level
600
ns
SN754410
QUADRUPLE HALF-H DRIVER
SLRS007B NOVEMBER 1986 REVISED NOVEMBER 1995
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
PARAMETER MEASUREMENT INFORMATION
Pulse
Generator
(see Note A)
VCC1 VCC2
GND
A
EN
Circuit
Under
Test
Y
Input
5 V
3 V
24 V
CL = 30 pF
(see Note B)
Output
TEST CIRCUIT
90%
1.5 V
tf
10%
tr
10%
90%
1.5 V
3 V
0 V
tw
td1
td2
VOH
VOL
90%
90%
10% 10%
tTHL
tTLH
Input
Output
VOLTAGE WAVEFORMS
Figure 1. Test Circuit and Switching Times From Data Inputs
Pulse
Generator
(see Note A)
VCC1 VCC2
GND
A
EN
Circuit
Under
Test
Y
Input
5 V
24 V
CL = 30 pF
(see Note B)
Output
TEST CIRCUIT
To 3 V for tPZH and tPHZ
To 0 V for tPZL and tPLZ
12 V
90%
1.5 V
tf
10%
tr
10%
90%
1.5 V
3 V
0 V
tw
Input
tdis1
tdis2
VOH
VOL
50%
Output
VOLTAGE WAVEFORMS
50%
12 V
ten1
ten2
50%
50%
12 V
Output
RL = 22
Figure 2. Test Circuit and Switching Times From Enable Inputs
NOTES: A. The pulse generator has the following characteristics: tr
10 ns, tf
10 ns, tw = 10
s, PRR = 5 kHz, ZO = 50
.
B. CL includes probe and jig capacitance.
SN754410
QUADRUPLE HALF-H DRIVER
SLRS007B NOVEMBER 1986 REVISED NOVEMBER 1995
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
APPLICATION INFORMATION
5 V
24 V
SN754410
Control A
10 k
16
Control B
8
2
1
7
10
9
15
4, 5, 12, 13
14
11
6
3
Motor
VCC1
GND
VCC2
2
1
EN
EN
EN
EN
Figure 3. Two-Phase Motor Driver
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Copyright
1998, Texas Instruments Incorporated
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