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Электронный компонент: TM248CBK32

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TM124BBK32, TM124BBK32S 1048576 BY 32-BIT
TM248CBK32, TM248CBK32S 2097152 BY 32-BIT
DYNAMIC RAM MODULE
SMMS132D JANUARY 1991 REVISED JUNE 1995
1
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
D
Organization
TM124BBK32 . . . 1 048 576
32
TM248CBK32 . . . 2 097 152
32
D
Single 5-V Power Supply (
10 % Tolerance)
D
72-pin Single In-Line Memory Module
(SIMM) for Use With Sockets
D
TM124BBK32-Utilizes Eight 4-Megabit
DRAMs in Plastic Small-Outline J-Lead
(SOJ) Packages
D
TM248CBK32-Utilizes Sixteen 4-Megabit
DRAMs in Plastic Small-Outline J-Lead
(SOJ) Packages
D
Distributed Refresh Period
16 ms (1024 Cycles)
D
All Inputs, Outputs, Clocks Fully TTL
Compatible
D
3-State Output
D
Common CAS Control for Eight Common
Data-In and Data-Out Lines, In Four Blocks
D
Presence Detect
D
Performance Ranges:
ACCESS
ACCESS
READ
TIME
TIME
OR
tRAC
tCAC
WRITE
CYCLE
(MAX) (MAX)
(MIN)
TM124BBK32-60
60 ns
15 ns
110 ns
TM124BBK32-70
70 ns
18 ns
130 ns
TM124BBK32-80
80 ns
20 ns
150 ns
TM248CBK32-60
60 ns
15 ns
110 ns
TM248CBK32-70
70 ns
18 ns
130 ns
TM248CBK32-80
80 ns
20 ns
150 ns
D
Low Power Dissipation
D
Operating Free-Air-Temperature Range
0
C to 70
C
D
Gold-Tabbed Versions Available:
TM124BBK32
TM248CBK32
D
Tin-Lead (Solder) Tabbed Versions
Available:
TM124BBK32S
TM248CBK32S
description
TM124BBK32
The TM124BBK32 is a dynamic random-access memory (DRAM) organized as four times 1 048 576
8 in a
72-pin leadless single in-line memory module (SIMM). The SIMM is composed of eight TMS44400, 1 048 576
4-bit DRAMs, each in 20/26-lead plastic SOJ packages, mounted on a substrate together with decoupling
capacitors. Each TMS44400 is described in the TMS44400 data sheet.
The TM124BBK32 is available in the single-sided BK leadless module for use with sockets.
The TM124BBK32 features RAS access times of 60 ns, 70 ns and 80 ns. This device is rated for operation from
0
C to 70
C
TM248CBK32
The TM248CBK32 is a dynamic random-access memory organized as four times 2 097 152
8 in a 72-pin
leadless SIMM. The SIMM is composed of sixteen TMS44400, 1 048 576
4-bit dynamic RAMs, each in
20/26-lead plastic SOJ packages SOJs, mounted on a substrate together with decoupling capacitors. Each
TMS44400 is described in the TMS44400 data sheet.
The TM248CBK32 is available in the double-sided BK leadless module for use with sockets.
The TM248CBK32 features RAS access times of 60 ns, 70 ns and 80 ns. This device is rated for operation from
0
C to 70
C
operation
TM124BBK32
The TM124BBK32 operates as eight TMS44400DJs connected as shown in the functional block diagram. Refer
to the TMS44400 data sheet for details of operation. The common I/O feature of the TM124BBK32 dictates the
use of early write cycles to prevent contention on D and Q.
Copyright
1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Part numbers in this data sheet are for the gold-tabbed version; the information applies to both gold-tabbed and solder-tabbed versions.
TM124BBK32, TM124BBK32S 1048576 BY 32-BIT
TM248CBK32, TM248CBK32S 2097152 BY 32-BIT
DYNAMIC RAM MODULE
SMMS132D JANUARY 1991 REVISED JUNE 1995
2
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
TM248CBK32
The TM248CBK32 operates as sixteen TMS44400DJs connected as shown in the functional block diagram.
Refer to the TMS44400 data sheet for details of operation. The common I/O feature of the TM248CBK32
dictates the use of early write cycles to prevent contention on D and Q.
refresh
Refresh period is extended to 16 ms and, during this period, each of the 1024 rows must be strobed with RAS
in order to retain data. A0-A9 address lines must be refreshed every 16 ms as required by the TMS44400 DRAM.
CAS can remain high during the refresh sequence to conserve power.
single in-line memory module and components
PC substrate: 1,27
0,1 mm (0.05 inch) nominal thickness; 0.005 inch/inch maximum warpage
Bypass capacitors: Multilayer ceramic
Contact area for TM124BBK32 AND TM248CBK32: Nickel plate and gold plate over copper.
Contact area for TM124BBK32S AND TM248CBK32S: Nickel plate and tin-lead over copper.
VSS
NC
PD4
PD3
PD2
PD1
NC
DQ15
DQ31
DQ14
DQ30
DQ13
DQ29
VCC
DQ28
DQ12
DQ27
DQ11
DQ26
DQ10
DQ25
DQ9
DQ24
DQ8
NC
W
NC
RAS1
RAS0
CAS1
CAS3
CAS2
CAS0
VSS
NC
NC
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
NC
NC
RAS2
RAS3
A9
A8
VCC
NC
A7
DQ23
DQ7
DQ22
DQ6
DQ21
DQ5
DQ20
DQ4
NC
A6
A5
A4
A3
A2
A1
A0
NC
VCC
DQ19
DQ3
DQ18
DQ2
DQ17
DQ1
DQ16
DQ0
VSS
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
The packages shown here are not drawn to scale.
PIN NOMENCLATURE
A0A9
Address Inputs
CAS0CAS3
Column-Address Strobe
DQ0DQ31
Data In/Data Out
NC
No Connection
PD1 PD4
Presence Detects
RAS0RAS3
Row-Address Strobe
VCC
5-V Supply
VSS
Ground
W
Write Enable
TM248CBK32
(SIDE VIEW)
TM124BBK32
(SIDE VIEW)
BK SINGLE IN-LINE MEMORY MODULE
(TOP VIEW)
TM124BBK32, TM124BBK32S 1048576 BY 32-BIT
TM248CBK32, TM248CBK32S 2097152 BY 32-BIT
DYNAMIC RAM MODULE
SMMS132D JANUARY 1991 REVISED JUNE 1995
3
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
PRESENCE DETECT
SIGNAL
(PIN)
PD1
(67)
PD2
(68)
PD3
(69)
PD4
(70)
80 ns
VSS
VSS
NC
VSS
TM124BBK32
70 ns
VSS
VSS
VSS
NC
60 ns
VSS
VSS
NC
NC
80 ns
NC
NC
NC
VSS
TM248CBK32
70 ns
NC
NC
VSS
NC
60 ns
NC
NC
NC
NC
TM124BBK32, TM124BBK32S 1
048
576 BY

32-BIT
TM248CBK32, TM248CBK32S 2
097
152 BY

32-BIT
DYNAMIC RAM MODULE
SMMS132D
JANUAR
Y
1991 REVISED JUNE 1995
T
emp
l
ate
R
e
l
ease
D
ate:
7
11
94
4
POST
OFFICE BOX 1443 HOUST
ON,
TEXAS

772511443
functional block diagram (for TM124BBK32 and TM248CBK32, Side 1)
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
A0 A9
DQ0
DQ3
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
DQ8
DQ11
DQ16
DQ19
DQ24
DQ27
DQ4
DQ7
DQ12
DQ15
DQ20
DQ23
DQ28
DQ31
W
RAS0
CAS0
CAS1
CAS2
CAS3
RAS2
10
10
10
10
10
10
10
10
10
TM124BBK32, TM124BBK32S 1
048
576 BY

32-BIT
TM248CBK32, TM248CBK32S 2
097
152 BY

32-BIT
DYNAMIC RAM MODULE
SMMS132D
JANUAR
Y
1991 REVISED JUNE 1995
POST
OFFICE BOX 1443 HOUST
ON,
TEXAS

772511443
5
functional block diagram (for TM248CBK32, Side 2)
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
A0 A9
DQ0
DQ3
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
1M
4
A0 A9
RAS
W
CAS
OE
DQ1
DQ4
DQ8
DQ11
DQ16
DQ19
DQ24
DQ27
DQ4
DQ7
DQ12
DQ15
DQ20
DQ23
DQ28
DQ31
W
RAS1
CAS0
CAS1
CAS2
CAS3
RAS3
10
10
10
10
10
10
10
10
10