TPS2048, TPS2058

QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

features

135-m

-Maximum (5-V Input) High-Side

MOSFET Switch

250 mA Continuous Current per Channel

Independent Short-Circuit and Thermal
Protection With Overcurrent Logic Output

Operating Range . . . 2.7-V to 5.5-V

Logic-Level Enable Input

2.5-ms Typical Rise Time

Undervoltage Lockout

A Maximum Standby Supply Current

Bidirectional Switch

Available in 16-pin SOIC Package

Ambient Temperature Range, 40

C to 85

2-kV Human-Body-Model, 200-V
Machine-Model ESD Protection

typical applications

Notebook, Desktop and Palmtop PCs

Monitors, Keyboards, Scanners, and
Printers

Digital Cameras, Phones, and PBXs

Hot-Insertion Applications

description

The TPS2048 and TPS2058 quad power-distribution switches are intended for applications where heavy
capacitive loads and short circuits are likely. These devices incorporate in single packages four 135-m

N-channel MOSFET high-side power switches for power-distribution systems that require multiple power
switches. Each switch is controlled by a logic enable compatible with 5-V and 3-V logic. Gate drive is provided
by an internal charge pump that controls the power-switch rise times and fall times to minimize current surges
during switching. The charge pump, requiring no external components, allows operation from supplies as low
as 2.7 V.

When the output load exceeds the current-limit threshold or a short is present, the TPS2048 and TPS2058 limit
the output current to a safe level by switching into a constant-current mode, pulling the overcurrent (OCx) logic
output low. When continuous heavy overloads and short circuits increase the power dissipation in the switch
causing the junction temperature to rise, a thermal protection circuit shuts off the switch in overcurrent to prevent
damage. Recovery from a thermal shutdown is automatic once the device has cooled sufficiently. Internal
circuitry ensures the switch remains off until valid input voltage is present.

The TPS2048 and TPS2058 are designed to limit at

0.44-A load. These power-distribution switches are

available in 16-pin small-outline integrated circuit (SOIC) packages and operate over an ambient temperature
range of 40

C to 85

AVAILABLE OPTIONS

RECOMMENDED MAXIMUM

TYPICAL SHORT-CIRCUIT

PACKAGED DEVICES

ENABLE

CONTINUOUS LOAD CURRENT

(A)

CURRENT LIMIT AT 25

(A)

SOIC

(D)

C to 85

Active low

0.25

0.44

TPS2048D

C to 85

Active high

0.25

0.44

TPS2058D

The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS2048DR)

1999, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

GND1

IN1

EN1
EN2

GND2

IN2

EN3
EN4

OC1
OUT1
OUT2
OC2
OC3
OUT3
OUT4
OC4

TPS2048

D PACKAGE

(TOP VIEW)

GND1

IN1

EN1
EN2

GND2

IN2

EN3
EN4

OC1
OUT1
OUT2
OC2
OC3
OUT3
OUT4
OC4

TPS2058

D PACKAGE

(TOP VIEW)

TPS2048, TPS2058

QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

Terminal Functions

TERMINAL

NAME

NO.

I/O

DESCRIPTION

NAME

TPS2048

TPS2058

EN1

Enable input. Logic low turns on power switch, IN1-OUT1.

EN2

Enable input. Logic low turns on power switch, IN1-OUT2.

EN3

Enable input. Logic low turns on power switch, IN2-OUT3.

EN4

Enable input. Logic low turns on power switch, IN2-OUT4.

EN1

Enable input. Logic high turns on power switch, IN1-OUT1.

EN2

Enable input. Logic high turns on power switch, IN1-OUT2.

EN3

Enable input. Logic high turns on power switch, IN2-OUT3.

EN4

Enable input. Logic high turns on power switch, IN2-OUT4.

GND1

Ground

GND2

Ground

IN1

Input voltage

IN2

Input voltage

OC1

Overcurrent. Logic output active low, IN1-OUT1

OC2

Overcurrent. Logic output active low, IN1-OUT2

OC3

Overcurrent. Logic output active low, IN2-OUT3

OC4

Overcurrent. Logic output active low, IN2-OUT4

OUT1

Power-switch output, IN1-OUT1

OUT2

Power-switch output, IN1-OUT2

OUT3

Power-switch output, IN2-OUT3

OUT4

Power-switch output, IN2-OUT4

TPS2048, TPS2058
QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

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detailed description

power switch

The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 m

I(INx)

= 5 V).

Configured as a high-side switch, the power switch prevents current flow from OUTx to INx and INx to OUTx
when disabled. The power switch can supply a minimum of 250 mA per switch.

charge pump

An internal charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate
of the MOSFET above the source. The charge pump operates from input voltages as low as 2.7 V and requires
very little supply current.

driver

The driver controls the gate voltage of the power switch. To limit large current surges and reduce the associated
electromagnetic interference (EMI) produced, the driver incorporates circuitry that controls the rise times and
fall times of the output voltage. The rise and fall times are typically in the 2-ms to 4-ms range.

enable (ENx or ENx)

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce
the supply current to less than 20

A when a logic high is present on ENx (TPS2048) or a logic low is present

on ENx (TPS2058). A logic zero input on ENx or logic high on ENx restores bias to the drive and control circuits
and turns the power on. The enable input is compatible with both TTL and CMOS logic levels.

overcurrent (OCx)

The OCx open drain output is asserted (active low) when an overcurrent or over temperature condition is
encountered. The output will remain asserted until the overcurrent or over temperature condition is removed.

current sense

A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than
conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry
sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into
its saturation region, which switches the output into a constant current mode and holds the current constant
while varying the voltage on the load.

thermal sense

The TPS2048 and TPS2058 implement a dual-threshold thermal trip to allow fully independent operation of the
power distribution switches. In an overcurrent or short-circuit condition the junction temperature rises. When
the die temperature rises to approximately 140

C, the internal thermal sense circuitry checks to determine which

power switch is in an overcurrent condition and turns off that switch, thus, isolating the fault without interrupting
operation of the adjacent power switches. Hysteresis is built into the thermal sense, and after the device has
cooled approximately 20 degrees, the switch turns back on. The switch continues to cycle off and on until the
fault is removed. The (OCx) open-drain output is asserted (active low) when overtemperature or overcurrent
occurs.

undervoltage lockout

A voltage sense circuit monitors the input voltage. When the input voltage is below approximately 2 V, a control
signal turns off the power switch.

TPS2048, TPS2058

QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage range, V

I(INx)

(see Note1)

0.3 V to 6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, V

O(OUTx)

(see Note1)

0.3 V to V

I(INx)

+ 0.3 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input voltage range, V

I(ENx)

or V

I(ENx)

0.3 V to 6 V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

O(OUTx)

Internally limited

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation

See Dissipation Rating Table

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating virtual junction temperature range, T

C to 125

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

C to 150

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature soldering 1,6 mm (1/16 inch) from case for 10 seconds

260

. . . . . . . . . . . . . . . . . . . . . . .

Electrostatic discharge (ESD) protection: Human body model MIL-STD-883C

2 kV

. . . . . . . . . . . . . . . . . . . . .

Machine model

0.2 kV

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to GND.

DISSIPATION RATING TABLE

PACKAGE

POWER RATING

DERATING FACTOR

ABOVE TA = 25

TA = 70

POWER RATING

TA = 85

POWER RATING

725 mW

5.8 mW/

464 mW

377 mW

recommended operating conditions

TPS2048

TPS2058

UNIT

MIN

MAX

MIN

MAX

UNIT

Input voltage, VI(INx)

2.7

5.5

2.7

5.5

Input voltage, VI(ENx) or VI(ENx)

5.5

Continuous output current, IO(OUTx)

250

Operating virtual junction temperature, TJ

125

TPS2048, TPS2058
QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

electrical characteristics over recommended operating junction temperature range, V

I(INx)

= 5.5 V,

= rated current, V

I(ENx)

= 0 V, V

I(ENx)

= Hi (unless otherwise noted)

power switch

PARAMETER

TEST CONDITIONS

TPS2048

TPS2058

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

VI(INx) = 5 V,
IO = 0.25 A

TJ = 25

Static drain-source on-state
resistance, 5-V operation

VI(INx) = 5 V,
IO = 0.25 A

TJ = 85

120

rDS( )

VI(INx) = 5 V,
IO = 0.25 A

TJ = 125

100

135

100

135

rDS(on)

VI(INx) = 3.3 V,
IO = 0.25 A

TJ = 25

105

Static drain-source on-state
resistance, 3.3-V operation

VI(INx) = 3.3 V,
IO = 0.25 A

TJ = 85

100

135

100

135

VI(INx) = 3.3 V,
IO = 0.25 A

TJ = 125

115

150

115

150

Rise time output

VI(INx) = 5.5 V,
CL = 1

TJ = 25

RL = 20

2.5

Rise time, output

VI(INx) = 2.7 V,
CL = 1

TJ = 25

RL = 20

Fall time output

VI(INx) = 5.5 V,
CL = 1

TJ = 25

RL = 20

4.4

Fall time, output

VI(INx) = 2.7 V,
CL = 1

TJ = 25

RL = 20

2.5

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

enable input ENx or ENx

PARAMETER

TEST CONDITIONS

TPS2048

TPS2058

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

VIH

Highlevel input voltage

2.7 V

VI(INx)

5.5 V

VIL

Low level input voltage

4.5 V

VI(INx)

5.5 V

0.8

VIL

Lowlevel input voltage

2.7 V

VI(INx)

4.5 V

0.4

Input current

TPS2048

VI(ENx) = 0 V or VI(ENx) = VI(INx)

0.5

Input current

TPS2058

VI(ENx) = VI(INx) or VI(ENx) = 0 V

0.5

ton

Turnon time

CL = 100

F, RL = 20

toff

Turnoff time

CL = 100

F, RL = 20

current limit

PARAMETER

TEST CONDITIONS

TPS2048

TPS2058

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

IOS

Short-circuit output current

VI(INx) = 5 V, OUT connected to GND,
Device enable into short circuit

0.345

0.44

0.525

0.345

0.44

0.525

Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.

TPS2048, TPS2058

QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

POST OFFICE BOX 655303

DALLAS, TEXAS 75265

electrical characteristics over recommended operating junction temperature range, V

I(INx)

= 5.5 V,

= rated current, V

I(ENx)

= 0 V, V

I(ENx)

= Hi (unless otherwise noted) (continued)

supply current

PARAMETER

TEST CONDITIONS

TPS2048

TPS2058

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

= 25

TPS2048

0.03

Supply current,

No Load

I(ENx)

= V

I(INx)

125

TPS2048

low-level output

on OUTx

I(EN )

= 0 V

= 25

TPS2058

0.03

I(ENx)

= 0 V

125

TPS2058

0 V

= 25

TPS2048

160

200

Supply current,
high level

No Load

I(ENx)

= 0 V

125

TPS2048

200

high-level
output

on OUTx

I(EN )

= V

I(IN )

= 25

TPS2058

160

200

I(ENx)

= V

I(INx)

125

TPS2058

200

Leakage

OUTx connected

I(ENx)

= V

I(INx)

125

TPS2048

200

current

to ground

I(ENx)

= 0 V

125

TPS2058

200

Reverse

INx = high

I(ENx)

= 0 V

= 25

TPS2048

0.3

leakage current

impedance

I(ENx)

= Hi

= 25

TPS2058

0.3

undervoltage lockout

PARAMETER

TEST CONDITIONS

TPS2048

TPS2058

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

Low-level input voltage

2.5

Hysteresis

TJ = 25

100

overcurrent OCx

PARAMETER

TEST CONDITIONS

TPS2048

TPS2058

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

Sink current

VO = 5 V

Output low voltage

IO = 5 mA, VOL(OCx)

0.5

Off-state current

VO = 5 V, VO = 3.3 V

Specified by design, not production tested.

TPS2048, TPS2058
QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

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PARAMETER MEASUREMENT INFORMATION

OUTx

90%

10%

50%

90%

10%

VO(OUTx)

VI(ENx)

VO(OUTx)

VOLTAGE WAVEFORMS

TEST CIRCUIT

ton

toff

50%

90%

10%

VI(ENx)

VO(OUTx)

ton

toff

Figure 1. Test Circuit and Voltage Waveforms

Figure 2. Turnon Delay and Rise Time

with 0.1-

F Load

Figure 3. Turnoff Delay and Fall Time

with 0.1-

F Load

VO(OUTx)

(2 V/div)

t Time ms

VI(INx) = 5 V
TA = 25

CL = 0.1

VI(ENx)

(5 V/div)

1000

2000

3000

t Time ms

4000

5000

VI(INx) = 5 V
TA = 25

CL = 0.1

VI(ENx)

(5 V/div)

VO(OUTx)

(2 V/div)

TPS2048, TPS2058

QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

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PARAMETER MEASUREMENT INFORMATION

Figure 4. Turnon Delay and Rise Time

with 1-

F Load

Figure 5. Turnoff Delay and Fall Time

with 1-

F Load

t Time ms

VI(ENx)

(5 V/div)

VO(OUTx)

(2 V/div)

VI(INx) = 5 V
TA = 25

CL = 1

RL = 20

t Time ms

VI(INx) = 5 V
TA = 25

CL = 1

RL = 20

VI(ENx)

(5 V/div)

VO(OUTx)

(2 V/div)

Figure 6. TPS2048, Short-Circuit Current,

Device Enabled into Short

t Time ms

IO(OUTx)

(0.2 A/div)

VI(INx) = 5 V
TA = 25

VI(ENx)

(5 V/div)

Figure 7. TPS2048, Threshold Trip Current

with Ramped Load on Enabled Device

t Time ms

90 100

IO(OUTx)

(0.5 A/div)

VI(INx) = 5 V
TA = 25

VO(OUTx)

(2 V/div)

TPS2048, TPS2058
QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

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PARAMETER MEASUREMENT INFORMATION

Figure 8. Inrush Current with 220-

F, 100-

and 47-

F Load Capacitance

Figure 9. Ramped Load on Enabled Device

100

220

t Time ms

VI(INx) = 5 V
TA = 25

RL = 20

VI(ENx)

(5 V/div)

IO(OUTx)

(0.2 A/div)

VI(INx) = 5 V
TA = 25

80 100 120

t Time ms

140 160 180 200

VO(OCx)

(5 V/div)

IO(OUTx)

(0.5 A/div)

Figure 10. 4-

Load Connected

to Enabled Device

IO(OUTx)

(0.5 A/div)

VI(INx) = 5 V
TA = 25

200

400

600

800

1000

VO(OCx)

(5 V/div)

t Time 

Figure 11. 1-

Load Connected

to Enabled Device

VI(INx) = 5 V
TA = 25

200

400

600

800

1000

t Time 

IO(OUTx)

(0.5 A/div)

VO(OCx)

(5 V/div)

TPS2048, TPS2058

QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

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TYPICAL CHARACTERISTICS

Figure 12

4.5

3.5

2.5

3.5

4.5

urnon Delay ms

5.5

TURNON DELAY

INPUT VOLTAGE

5.5

VI Input Voltage V

CL = 1

RL = 20

TA = 25

Figure 13

2.5

3.5

4.5

urnoff Delay ms

TURNOFF DELAY

INPUT VOLTAGE

5.5

VI Input Voltage V

CL = 1

RL = 20

TA = 25

Figure 14

2.5

2.4

2.3

0.05

0.1

0.15

0.2

0.25

 Rise T

ime ms

2.6

RISE TIME

LOAD CURRENT

2.7

0.3

0.35

0.4

t r

IL Load Current A

VI (INx) = 5 V
TA = 25

Figure 15

2.75

2.7

2.65

0.05

0.1

0.15

0.2

0.25

 Fall T

ime ms

2.8

FALL TIME

LOAD CURRENT

2.85

0.3

0.35

0.4

t f

IL Load Current A

VI (INx) = 5 V
TA = 25

TPS2048, TPS2058
QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

SLVS192 APRIL 1999

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TYPICAL CHARACTERISTICS

Figure 16

140

120

100

50

25

 Supply Current, Output Enabled 

160

180

SUPPLY CURRENT, OUTPUT ENABLED

JUNCTION TEMPERATURE

200

100

125

150

I I(INx)

TJ Junction Temperature 

VI(INx) = 5.5 V

VI(INx) = 5 V

VI(INx) = 4 V

VI(INx) = 3.3 V

VI(INx) = 2.7 V

Figure 17

1000

600

200

50

25

1400

1800

SUPPLY CURRENT, OUTPUT DISABLED

JUNCTION TEMPERATURE

2000

100

125

150

1600

1200

800

400

 Supply Current, Output Disabled nA

I I(INx)

TJ Junction Temperature 

VI(INx) = 5.5 V

VI(INx) = 5 V

VI(INx) = 4 V

VI(INx) = 2.7 V

Figure 18

140

120

100

2.5

3.5

4.5

 Supply Current, Output Enabled 

160

180

SUPPLY CURRENT, OUTPUT ENABLED

INPUT VOLTAGE

200

5.5

I I(INx)

VI Input Voltage V

TJ = 40

TJ = 125

TJ = 85

TJ = 25

TJ = 0

Figure 19

800

400

2.5

3.5

4.5

1200

1600

SUPPLY CURRENT, OUTPUT DISABLED

INPUT VOLTAGE

2000

5.5

 Supply Current, Output Disabled nA

I I(INx)

VI Input Voltage V

TJ = 40

TJ = 125

TJ = 85

TJ = 25

TJ = 0

TPS2048, TPS2058

QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

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TYPICAL CHARACTERISTICS

Figure 20

100

50

25

 Static Drain-Source On-State Resistance m

125

150

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

JUNCTION TEMPERATURE

175

100

125

150

DS(on)

TJ Junction Temperature 

VI(INx) = 5 V

VI(INx) = 4.5 V

VI(INx) = 3.3 V

VI(INx) = 2.7 V

IO = 0.25 A

Figure 21

100

2.5

3.5

4.5

125

150

STATIC DRAIN-SOURCE ON-STATE RESISTANCE

INPUT VOLTAGE

175

5.5

 Static Drain-Source On-State Resistance m

DS(on)

VI Input Voltage V

TJ = 40

TJ = 125

TJ = 85

TJ = 25

TJ = 0

IO = 0.25 A

Figure 22

VI(INx) = 5 V

VI(INx) = 2.7 V

VI(INx) = 4.5 V

VI(INx) = 3.3 V

0.1

0.14

0.18

 Input-T

o-Output V

oltage mV

INPUT-TO-OUTPUT VOLTAGE

LOAD CURRENT

0.22

0.3

I(INx)

O(OUTx)

IL Load Current A

0.26

TA = 25

Figure 23

TJ = 40

TJ = 25

TJ = 125

390

350

2.5

3.5

 Short-circuit Output Current mA

450

SHORT-CURCUIT OUTPUT CURRENT

INPUT VOLTAGE

490

4.5

5.5

I OS

VI Input Voltage V

470

430

410

370

TPS2048, TPS2058
QUAD CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES

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TYPICAL CHARACTERISTICS

Figure 24

0.69

0.67

0.65

2.5

3.5

Threshold

rip Current 

0.71

THRESHOLD TRIP CURRENT

INPUT VOLTAGE

0.73

4.5

5.5

VI Input Voltage V

TA = 25

Load Ramp = 1 A/10 ms

Figure 25

420

405

50

25

435

SHORTCIRCUIT OUTPUT CURRENT

JUNCTION TEMPERATURE

450

100

125

TJ Junction Temperature 

 Short-circuit Output Current mA

I OS

VI(INx) = 5 V

VI(INx) = 4 V

VI(INx) = 2.7 V

445

440

430

425

415

410

Figure 26

2.2

2.1

50

25

UVLO Undervoltage Lockout V

2.3

2.4

UNDERVOLTAGE LOCKOUT

JUNCTION TEMPERATURE

2.5

100

125

150

TJ Junction Temperature 

Start Threshold

Stop Threshold

Figure 27

250

100

Current Limit Response 

350

Peak Current A

CURRENT-LIMIT RESPONSE

PEAK CURRENT

500

VI(INx) = 5 V
TA = 25

TPS2048, TPS2058

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TYPICAL CHARACTERISTICS

Figure 28

5.5

Overcurrent OCx T

ime 

8.5

Peak Current A

OVERCURRENT (OCx) RESPONSE TIME

PEAK CURRENT

VI(INx) = 5 V
TA = 25

APPLICATION INFORMATION

IN1

OC1

EN1

OC3

EN3

0.1

Load

OUT1

OUT2

Power Supply

2.7 V to 5.5 V

IN2

OC2

OC4

0.1

Load

OUT3

OUT4

EN2

EN4

GND1

GND2

Figure 29. Typical Application

TPS2048, TPS2058
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APPLICATION INFORMATION

power supply considerations

A 0.01-

F to 0.1-

F ceramic bypass capacitor between IN and GND, close to the device, is recommended.

Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is heavy.
This precaution reduces power-supply transients that may cause ringing on the input. Additionally, bypassing
the output with a 0.01-

F to 0.1-

F ceramic capacitor improves the immunity of the device to short-circuit

transients.

overcurrent

A sense FET checks for overcurrent conditions. Unlike current-sense resistors, sense FETs do not increase the
series resistance of the current path. When an overcurrent condition is detected, the device maintains a
constant output current and reduces the output voltage accordingly. Complete shutdown occurs only if the fault
is present long enough to activate thermal limiting.

Three possible overload conditions can occur. In the first condition, the output has been shorted before the
device is enabled or before V

I(INx)

has been applied (see Figure 6). The TPS2048 and TPS2058 sense the short

and immediately switch into a constant-current output.

In the second condition, the short occurs while the device is enabled. At the instant the short occurs, very high
currents may flow for a short time before the current-limit circuit can react . After the current-limit circuit has
tripped (reached the overcurrent trip threshhold) the device switches into constant-current mode.

In the third condition, the load has been gradually increased beyond the recommended operating current. The
current is permitted to rise until the current-limit threshold is reached or until the thermal limit of the device is
exceeded (see Figure 7). The TPS2048 and TPS2058 are capable of delivering current up to the current-limit
threshold without damaging the device. Once the threshold has been reached, the device switches into its
constant-current mode.

OC response

The OC open-drain output is asserted (active low) when an overcurrent or overtemperature condition is
encountered. The output will remain asserted until the overcurrent or overtemperature condition is removed.
Connecting a heavy capacitive load to an enabled device can cause momentary false overcurrent reporting from
the inrush current flowing through the device, charging the downstream capacitor. An RC filter of 500

s (see

Figure 30) can be connected to OCx to reduce false overcurrent reporting caused by hot-plug switching events
or extremly high capacitive loads. Using low-ESR electrolytic capacitors on the output lowers the inrush current
flow through the device during hot-plug events by providing a low impedance energy source, thereby reducing
erroneous overcurrent reporting.

TPS2048, TPS2058

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APPLICATION INFORMATION

GND1

IN1

EN1

EN2

OC1

OC2

OUT1

OUT2

TPS2048

GND1

IN1

EN1

EN2

OC1

OC2

OUT1

OUT2

TPS2048

Rpullup

V+

Rfilter

Rpullup

Cfilter

To USB
Controller

V+

OC3

OC4

OUT3

OUT4

GND2

IN2

EN3

EN4

GND2

IN2

EN3

EN4

OC3

OC4

OUT3

OUT4

Figure 30. Typical Circuit for OC Pin and RC Filter for Damping Inrush OC Responses

power dissipation and junction temperature

The low on-resistance on the n-channel MOSFET allows small surface-mount packages, such as SOIC, to pass
large currents. The thermal resistances of these packages are high compared to those of power packages; it
is good design practice to check power dissipation and junction temperature. The first step is to find r

DS(on)

the input voltage and operating temperature. As an initial estimate, use the highest operating ambient
temperature of interest and read r

DS(on)

from Figure 21. Next, calculate the power dissipation using:

DS(on)

Finally, calculate the junction temperature:

)

Where:

= Ambient Temperature

= Thermal resistance SOIC = 172

C/W

Compare the calculated junction temperature with the initial estimate. If they do not agree within a few degrees,
repeat the calculation, using the calculated value as the new estimate. Two or three iterations are generally
sufficient to get a reasonable answer.

TPS2048, TPS2058
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APPLICATION INFORMATION

thermal protection

Thermal protection prevents damage to the IC when heavy-overload or short-circuit faults are present for
extended periods of time. The faults force the TPS2048 and TPS2058 into constant current mode, which causes
the voltage across the high-side switch to increase; under short-circuit conditions, the voltage across the switch
is equal to the input voltage. The increased dissipation causes the junction temperature to rise to high levels.
The protection circuit senses the junction temperature of the switch and shuts it off. Hysteresis is built into the
thermal sense circuit, and after the device has cooled approximately 20 degrees, the switch turns back on. The
switch continues to cycle in this manner until the load fault or input power is removed.

The TPS2048 and TPS2058 implement a dual thermal trip to allow fully independent operation of the power
distribution switches. In an overcurrent or short-circuit condition the junction temperature will rise. Once the die
temperature rises to approximately 140

C, the internal thermal sense circuitry checks which power switch is

in an overcurrent condition and turns that power switch off, thus isolating the fault without interrupting operation
of the adjacent power switch. Should the die temperature exceed the first thermal trip point of 140

C and reach

160

C, both switches turn off. The OC open-drain output is asserted (active low) when overtemperature or

overcurrent occurs.

undervoltage lockout (UVLO)

An undervoltage lockout ensures that the power switch is in the off state at power up. Whenever the input voltage
falls below approximately 2 V, the power switch will be quickly turned off. This facilitates the design of
hot-insertion systems where it is not possible to turn off the power switch before input power is removed. The
UVLO will also keep the switch from being turned on until the power supply has reached at least 2 V, even if
the switch is enabled. Upon reinsertion, the power switch will be turned on with a controlled rise time to reduce
EMI and voltage overshoots.

Universal Serial Bus (USB) applications

The universal serial bus (USB) interface is a 12-Mb/s, or 1.5-Mb/s, multiplexed serial bus designed for
low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). The four-wire USB
interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for
differential data, and two lines are provided for 5-V power distribution.

USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power
is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V
from the 5-V input or its own internal power supply.

The USB specification defines the following five classes of devices, each differentiated by power-consumption
requirements:

Hosts/self-powered hubs (SPH)

Bus-powered hubs (BPH)

Low-power, bus-powered functions

High-power, bus-powered functions

Self-powered functions

Bus-powered hubs distribute data and power to downstream functions. The TPS2048 and TPS2058 can
provide power-distribution solutions for many of these classes of devices.

TPS2048, TPS2058

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APPLICATION INFORMATION

bus-powered hubs

Bus-powered hubs obtain all power from upstream ports and often contain an embedded function. The hubs
are required to power up with less than one unit load. The BPH usually has one embedded function, and power
is always available to the controller of the hub. If the embedded function and hub require more than 100 mA
on power up, the power to the embedded function may need to be kept off until enumeration is completed. This
can be accomplished by removing power or by shutting off the clock to the embedded function. Power switching
the embedded function is not necessary if the aggregate power draw for the function and controller is less than
one unit load. The total current drawn by the bus-powered device is the sum of the current to the controller, the
embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port.

low-power bus-powered functions and high-power bus-powered functions

Both low-power and high-power bus-powered functions obtain all power from upstream ports; low-power
functions always draw less than 100 mA, and high-power functions must draw less than 100 mA at power up
and can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination
of 44

and 10

F at power up, the device must implement inrush current limiting (see Figure 31).

IN1

OC1

EN1

OC3

EN3

0.1

Internal

Function

OUT1

OUT2

Power Supply

3.3 V

IN2

OC2

OC4

0.1

OUT3

OUT4

EN2

EN4

GND1

GND2

Internal

Function

Internal

Function

Internal

Function

0.1

USB

Control

GND

VBUS

D+

TPS2048

Figure 31. High-Power Bus-Powered Function

TPS2048, TPS2058
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APPLICATION INFORMATION

USB power-distribution requirements

USB can be implemented in several ways, and, regardless of the type of USB device being developed, several
power distribution features must be implemented.

Bus-Powered Hubs must:

Enable/disable power to downstream ports

Power up at <100 mA

Limit inrush current (<44

and 10

Functions must:

Limit inrush currents

Power up at <100 mA

The feature set of the TPS2048 and TPS2058 allows them to meet each of these requirements. The integrated
current-limiting and overcurrent reporting is required by hosts and self-powered hubs. The logic-level enable
and controlled rise times meet the need of both input and output ports on bus-power hubs, as well as the input
ports for bus-power functions (see Figure 32).

TPS2048, TPS2058

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APPLICATION INFORMATION

Figure 32. Bus-Powered Hub Implementation

DP1

DM1

DP2

DM2

DP3

DM3

DP4

PWRON1

OVRCUR1

PWRON2

OVRCUR2

PWRON3

OVRCUR3

PWRON4

OVRCUR4

DM4

DP0

DM0

VCC

XTAL1

XTAL2

OCSOFF

SN75240

D +

D 

5 V

GND

D +

D 

5 V

D +

D 

5 V

D +

D 

5 V

48-MHz

Crystal

Downstream

Ports

TUSB2040

Hub Controller

Tuning

Circuit

A
B

C
D

SN75240

A
B

C
D

GND

D +

D 

Upstream
Port

SN75240

5 V

GND

C
D

GND

Ferrite Beads

BUSPWR

GANGED

GND

3.3 V

4.7

0.1

4.7

EN1

IN1

OC1

OUT1

TPS2048

EN2

OC2

OUT2

0.1

GND

USB rev 1.1 requires 120

F per hub.

EN3

OC3

OUT3

EN4

OC4

OUT4

IN2

GND1

GND2

TPS76333

TPS2048, TPS2058
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APPLICATION INFORMATION

generic hot-plug applications (see Figure 33)

In many applications it may be necessary to remove modules or pc boards while the main unit is still operating.
These are considered hot-plug applications. Such implementations require the control of current surges seen
by the main power supply and the card being inserted. The most effective way to control these surges is to limit
and slowly ramp the current and voltage being applied to the card, similar to the way in which a power supply
normally turns on. Due to the controlled rise times and fall times of the TPS2048 and TPS2058, these devices
can be used to provide a softer start-up to devices being hot-plugged into a powered system. The UVLO feature
of the TPS2048 and TPS2058 also ensures the switch will be off after the card has been removed, and the switch
will be off during the next insertion. The UVLO feature guarantees a soft start with a controlled rise time for every
insertion of the card or module.

Power

Supply

Block of
Circuitry

0.1

1000

Optimum

2.7 V to 5.5 V

PC Board

Overcurrent Response

TPS2048

GND1

IN1

EN1

OC1

OUT1

OUT2

OC2

EN2

GND2

EN3

IN2

EN4

OC3

OUT3

OUT4

OC4

Block of
Circuitry

Figure 33. Typical Hot-Plug Implementation

By placing the TPS2048 or TPS2058 between the V

input and the rest of the circuitry, the input power will

reach these devices first after insertion. The typical rise time of the switch is approximately 2.5 ms, providing
a slow voltage ramp at the output of the device. This implementation controls system surge currents and
provides a hot-plugging mechanism for any device.

TPS2048, TPS2058

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MECHANICAL DATA

D (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

4040047 / D 10/96

0.228 (5,80)

0.244 (6,20)

0.069 (1,75) MAX

0.010 (0,25)

0.004 (0,10)

0.014 (0,35)

0.020 (0,51)

0.157 (4,00)

0.150 (3,81)

0.044 (1,12)

0.016 (0,40)

Seating Plane

0.010 (0,25)

PINS **

0.008 (0,20) NOM

A MIN

A MAX

DIM

Gage Plane

0.189

(4,80)

(5,00)

0.197

(8,55)

(8,75)

0.337

0.344

(9,80)

0.394

(10,00)

0.386

0.004 (0,10)

0.010 (0,25)

0.050 (1,27)

 8

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012

IMPORTANT NOTICE

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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL
APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER'S RISK.

In order to minimize risks associated with the customer's applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI's publication of information regarding any third
party's products or services does not constitute TI's approval, warranty or endorsement thereof.

1999, Texas Instruments Incorporated

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