TVP5145PFP
NTSC/PAL/SECAM/Component Digital Video
Decoder With Macrovision
Detection
May 2002
HPA Digital Audio Video
Data Manual
SLES029A
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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Use of such information may require a license from a third party under the patents or other intellectual property
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Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright
2002, Texas Instruments Incorporated
iii
Contents
Section
Title
Page
1
Introduction
11
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1
Features
11
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
Applications
12
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3
Related Products
13
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4
Ordering Information
13
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.5
Functional Block Diagram
14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.6
Terminal Assignments
15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.7
Terminal Functions
16
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.8
Strapping Terminals Description
18
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Functional Description
21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1
Analog Video Processing and A/D Converters
21
. . . . . . . . . . . . . . . . . . .
2.1.1
Video Input Selection
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.2
Analog Input Clamping and Automatic Gain Control
Circuits
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1.3
A/D Converters
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
Digital Processing
22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.1
Digital Input Selection
23
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.2
Decimation Filter
24
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3
Y/C Separation
24
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.3.1
Color Low-Pass Filter
25
. . . . . . . . . . . . . . . . . . . .
2.2.3.2
Adaptive Comb Filter
26
. . . . . . . . . . . . . . . . . . . . .
2.2.4
Luminance Processing
28
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.5
Chrominance Processing
29
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2.6
SECAM Processing
210
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3
Clock Circuits
212
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4
Genlock Control (GLCO) and Real-Time Control (RTC)
212
. . . . . . . . . . .
2.4.1
GLCO Mode
212
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4.2
RTC Mode
213
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5
Video Output Format
213
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5.1
Sampling Frequencies and Patterns
213
. . . . . . . . . . . . . . . . . . .
2.5.2
Video Port 20-/16-Bit 4:2:2 Output Format Timing
214
. . . . . . .
2.5.3
Video Port 10-/8-Bit 4:2:2 and ITU-R BT.656 Output
Format Timing
215
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6
Synchronization Signals
215
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6.1
Separate Syncs
215
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6.2
AVID Cropping
217
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6.3
Embedded Syncs
218
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7
Host Interface
219
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
iv
2.7.1
I2C Host Port Select
219
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.1.1
I
2
C Write Operation
220
. . . . . . . . . . . . . . . . . . . . . .
2.7.1.2
I
2
C Read Operation
220
. . . . . . . . . . . . . . . . . . . . . .
2.7.1.3
Read Phase 1
221
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.1.4
Read Phase 2
221
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.1.5
Microprocessor Start by I
2
C
221
. . . . . . . . . . . . . . .
2.7.1.6
I
2
C Timing Requirements
222
. . . . . . . . . . . . . . . . .
2.7.2
Parallel Host Interface (PHI)
222
. . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.2.1
PHI Register Mapping
223
. . . . . . . . . . . . . . . . . . . .
2.7.2.2
PHI Read/Write Operation
223
. . . . . . . . . . . . . . . .
2.7.2.3
Latency
224
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.2.4
VBI FIFO
224
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7.2.5
Interrupt Status Register A
224
. . . . . . . . . . . . . . . .
2.7.2.6
Microprocessor Start by PHI
224
. . . . . . . . . . . . . . .
2.8
VBI Data Processor
224
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.8.1
VBI FIFO and Ancillary Data in Video Stream
226
. . . . . . . . . . .
2.9
Raw Video Data Output
227
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.10
Reset and Initialization
227
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11
Internal Control Registers
227
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12
Register Definitions
230
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.1
Video Input Source Selection #1 Register
230
. . . . . . . . . . . . . .
2.12.2
Analog Channel Controls Register
231
. . . . . . . . . . . . . . . . . . . .
2.12.3
Operation Mode Controls Register
232
. . . . . . . . . . . . . . . . . . . .
2.12.4
Miscellaneous Control Register
233
. . . . . . . . . . . . . . . . . . . . . . .
2.12.5
Color Killer Threshold Control Register
234
. . . . . . . . . . . . . . . .
2.12.6
Luminance Processing Control #1 Register
234
. . . . . . . . . . . .
2.12.7
Luminance Processing Control #2 Register
235
. . . . . . . . . . . .
2.12.8
Brightness Control Register
235
. . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.9
Color Saturation Control Register
235
. . . . . . . . . . . . . . . . . . . . .
2.12.10
Hue Control Register
235
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.11
Contrast Control Register
236
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.12
Outputs and Data Rates Select Register
236
. . . . . . . . . . . . . . .
2.12.13
Luminance Control #3 Register
237
. . . . . . . . . . . . . . . . . . . . . . .
2.12.14
AVID Start Pixel MSB
237
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.15
AVID Start Pixel LSB
237
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.16
AVID Stop Pixel MSB
237
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.17
AVID Stop Pixel LSB
238
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.18
GLCO and RTC Register
238
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.19
Horizontal Sync (HSYN) Start Register
238
. . . . . . . . . . . . . . . .
2.12.20
Vertical Blanking Start Register
239
. . . . . . . . . . . . . . . . . . . . . . .
2.12.21
Vertical Blanking Stop Register
239
. . . . . . . . . . . . . . . . . . . . . . .
2.12.22
Chrominance Control #1 Register
240
. . . . . . . . . . . . . . . . . . . . .
2.12.23
Chrominance Control #2 Register
241
. . . . . . . . . . . . . . . . . . . . .
2.12.24
Interrupt Reset Register B
241
. . . . . . . . . . . . . . . . . . . . . . . . . . .
v
2.12.25
Interrupt Enable Register B
242
. . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.26
Interrupt Configuration Register B
243
. . . . . . . . . . . . . . . . . . . . .
2.12.27
Video Input Source Selection #2 Register
243
. . . . . . . . . . . . . .
2.12.28
Crystal Frequency Register
244
. . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.29
Video Standard Register
244
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.30
Microprocessor Start Register
244
. . . . . . . . . . . . . . . . . . . . . . . .
2.12.31
Major ROM Version Register
244
. . . . . . . . . . . . . . . . . . . . . . . . .
2.12.32
Status Register #1
245
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.33
Status Register #2
246
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.34
Status Register #3
246
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.35
Status Register #4
246
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.36
Interrupt Status Register B
247
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.37
Interrupt Active Register B
247
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.38
Minor ROM Version Register
248
. . . . . . . . . . . . . . . . . . . . . . . . .
2.12.39
Status Register #5
248
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.40
Vertical Line Count MSB Register
248
. . . . . . . . . . . . . . . . . . . . .
2.12.41
Vertical Line Count LSB Register
249
. . . . . . . . . . . . . . . . . . . . .
2.12.42
Analog Die ID Register
249
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.43
Digital Die ID Register
249
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.44
Closed Caption Data Registers
249
. . . . . . . . . . . . . . . . . . . . . . .
2.12.45
WSS Data Registers
250
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.46
VPS Data Registers
251
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.47
VITC Data Registers
251
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.48
VBI FIFO Read Data Register
251
. . . . . . . . . . . . . . . . . . . . . . . .
2.12.49
Teletext Filter and Mask Registers
252
. . . . . . . . . . . . . . . . . . . .
2.12.50
Teletext Filter Control Register
253
. . . . . . . . . . . . . . . . . . . . . . . .
2.12.51
Interrupt Status Register A
255
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.52
Interrupt Enable Register A
256
. . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.53
Interrupt Configuration Register A
257
. . . . . . . . . . . . . . . . . . . . .
2.12.54
VDP Configuration RAM Register
257
. . . . . . . . . . . . . . . . . . . . .
2.12.55
VDP Status Register
259
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.56
FIFO Word Count Register
259
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.57
FIFO Interrupt Threshold Register
260
. . . . . . . . . . . . . . . . . . . .
2.12.58
FIFO Reset Register
260
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.59
Line Number Interrupt Register
260
. . . . . . . . . . . . . . . . . . . . . . .
2.12.60
Pixel Alignment Registers
260
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.61
FIFO Output Control Register
261
. . . . . . . . . . . . . . . . . . . . . . . .
2.12.62
VDP Clock Register
261
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.63
Full Field Enable Register
261
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.64
Line Mode Registers
262
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12.65
Full Field Mode Register
263
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Electrical Specifications
31
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1
Absolute Maximum Ratings
31
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
Recommended Operating Conditions
31
. . . . . . . . . . . . . . . . . . . . . . . . . .
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