G56054-0, Rev 1.0
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VSC9142
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1.0 Product Description
Page 1
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1.0
Product Description
1.1
Functional Overview
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G56054, R
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0
S
T
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ysical
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ayer Pack
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Over SONET
/
SD
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VSC
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1.0 Product
D
escript
i
on
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Section
Generation
TSOP
Section
Trace Buffer
SSTB
INTB
RSTB
RDB
WRB
CSB
ALE
A[8..0]
D[7..0]
LOF
LOS
RXRCLK
PHY
Section
Termination
RSOP
CPU
Line
Generation
TLOP
Line
Termination
RLOP
Path
Generation
TPOP
Path
Trace Buffer
SPTB
Path
Termination
RPOP
Packet/ATM
Mapping
TPP/TACP
System Layer Interface
POSPHY-3 Packet Interface / UTOPIA-3 Cell Interface
PIF/UIF
Packet/ATM
Demapping
RPP/RACP
RENB
RFCLKO
RFCLK
RERR
REOP
RMOD[1..0]
RDAT[31..0]
RPRTY
RVAL
RSOP
GPIO[7..0]
PMTICK
LCD-P
BERM
JTAG
TXRCLK
OE
TRSTB
TMS
TCK
TDI
TDO
Transport Overhead Extraction
ROAP
RSPCLK1
RSPVALID1
RSPDAT1
RSPVALID2
RSPDAT2
RSPCLK2
RTOHFP
RTOH[3..0]
RTOHCLK
RTOHVALID
RSPFP
Transport Overhead Insertion
TOAP
TSPCLK1
TSPFP1
TSPREN1
RTOHFP
TTOHEN
TTOHCLK
TTOHREN
TSPDAT1
TSPCLK2
TSPFP2
TSPREN2
TSPDAT2
TTOH[3..0]
TENB
TFCLKO
TFCLK
TERR
TEOP
TMOD[1..0]
TDAT[31..0]
TPRTY
DTPA
TSOP
TLSYNCTTL
TLSYNCLDVS+/-
TLOUTSER+/-
TLCLKSER+/-
CMU
+
MUX
CMUREFCLK+/-
CMUFILTER+/-
CMUREFSEL[1..0]
CMULOCKDET
LOOPTIMING
RLINSER+/-
CRU
+
DMX
CRUREFCLK+/-
CRUFILTER+/-
CRUREFOUTSEL
CRULOCKDET
CRUREFSEL[1..0]
PHY
CRURECCLK+/-
CMUREFDET
RXTS
TXST
PHY4BITSEL
LOPC
CLKRSTEN
DMX
RLPRTY4+/-
RLIN4[3..0]+/-
RLCLK4+/-
MUX
TLPRTY4+/-
TLOUT[3..0]+/-
TLCLK4O+/-
TLCLK4+/-
CRUREFDET
RLINSERMID
Figure
1.1.
VSC9142 Functional Block Diagram
G56054-0, Rev 1.0
SONET/SDH 2.5Gbps Transport Terminating Transceiver
VSC9142
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4.0 Electrical & Mechanical Data
Page 3
.
1.2
VSC9142 Functional Blocks
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G56054, Rev 1.0
STS-48c Physical Layer Packet/ATM Over SONET/SDH Device
VSC9142
Page 4
1.0 Product Description
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G56054-0, Rev 1.0
SONET/SDH 2.5Gbps Transport Terminating Transceiver
VSC9142
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4.0 Electrical & Mechanical Data
Page 5
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